Concept

Biasing

Related publications (120)

A new definition of threshold voltage in Tunnel FETs

This work reports on the physical definition and extraction of threshold voltage in Tunnel FETs (field effect transistors) based on numerical simulation data. It is shown that the Tunnel FET has the outstanding property of having two threshold voltages: on ...

2008

Prospects for logic-on-a-wire

Giovanni De Micheli, Mihai Adrian Ionescu, David Atienza Alonso, Didier Bouvet, Kirsten Emilie Moselund, Yusuf Leblebici, Mohamed Haykel Ben Jamaa

In this paper we present the top-down fabrication of gate-all-around (GAA) and body-tied @W-gate devices by a combination of etching and oxidation steps resulting in a local silicon-on-insulator structure. The GAA has advantages in terms of enhanced curren ...

2008

Ultra Low Power Subthreshold MOS Current Mode Logic Circuits Using a Novel Load Device Concept

Seyed Armin Tajalli, Eric Vittoz, Yusuf Leblebici

This article presents a novel and robust approach for implementing ultra-low power MOS current mode logic (MCML) circuits. To operate at very low bias currents, a simple and compact high resistance load device has been introduced. Operating in subthreshold ...

2007

The Light at the End of the Tunnel Junction - Improving the Energy Resolution of UV Single-Photon Spectrometers using Diffusion Engineering

Andreea Veronica Savu

We present experimental results which test whether diffusion engineering can increase the energy resolution of a single-photon superconducting tunnel-junction spectrometer. When a UV photon is absorbed in superconducting Al, it creates an excess number of ...

Yale University2007

Ferroelectric Gate on AlGaN/GaN Heterostructures

Nava Setter, Paul Muralt, Igor Stolichnov, Lisa Malin

A PZT, Pb(Zr,Ti)O-3 (40:60), ferroelectric layer has been successfully deposited onto a Al0.3Ga0.7N/GaN heterostructure with a 2DEG, two dimensional electron gas. Due to the chemical and temperature stability of AlGaN/GaN it was possible to implement the c ...

IEEE2007

Ultra low power subthreshold current-mode logic utilizing a novel PMOS load device

Seyed Armin Tajalli, Eric Vittoz, Yusuf Leblebici

A novel approach for implementing MOS current-mode logic (MCML) circuits that can operate with ultra low bias currents is introduced. Measurements of test structures fabricated in 0.18 μm CMOS technology show that the proposed PMOS load device concept can ...

2007

Threshold voltage in Tunnel FETs: physical definition, extraction, scaling and impact on IC design

Mihai Adrian Ionescu, Katherine Boucart

This work reports on the physical definition and extraction of threshold voltage in Tunnel FETs based on numerical simulation data. It is shown that the Tunnel FET has the outstanding property of having two threshold voltages: one in terms of gate voltage, ...

Ieee Service Center2007

Integrated Hall Microsystem with Current Re-Use

Radivoje Popovic, Pavel Kejik, Predrag Drljaca

A new architecture of a Hall microsystem for low-power applications is presented. The innovation in this paper lies in the re-use of the electric current for biasing of several parts in the microsystem permitting substantial reduction of the current consum ...

American Scientific Publishers2007

AlInN/GaN a suitable HEMT device for extremely high power high frequency applications

Nicolas Grandjean, Jean-François Carlin, Eric Feltin

AlInN/GaN unpassivated High Electron Mobility Transistor (HEMT) on Sapphire substrate has yielded a maximum drain current density close to 2 A/mm in steady state. Superior gate length downscaling than AlGaN/GaN devices has been observed owing to the possib ...

Ieee2007

A Power-Efficient LVDS Driver Circuit in 0.18-um CMOS Technology

Seyed Armin Tajalli, Yusuf Leblebici

This article presents a power-efficient and low-voltage CMOS output driver circuit based on low-voltage differential signaling (LVDS) standard. To reduce the ringing at the output of the proposed driver circuit and simultaneously keep the power consumption ...

IEEE Service Center2007

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