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Until recently, the ever-increasing demand of computing power has been met on one hand by increasing the operating frequency of processors and on the other hand by designing architectures capable of exploiting parallelism at the instruction level through h ...
Recent research advocates address-correlating predictors to identify cache block addresses for prefetch. Unfortunately, address-correlating predictors require correlation data storage proportional in size to a program's active memory footprint. As a result ...
The personal positioning and navigation became a very challenging topic in our dynamic time. The urban canyons and particularly indoors represent the most difficult areas for personal navigation problematic. Problems like disturbed satellite signals make t ...
Because the market has an insatiable appetite for new functionality, performance is becoming an increasingly important factor. The telecommunication and network domains are especially touched by this phenomenon but they are not the only ones. For instance, ...
Several computer vision problems, like segmentation, tracking and shape modeling, are increasingly being solved using level set methodologies. But the critical issues of stability and convergence have always been neglected in most of the level set implemen ...
Today computers are part of the standard equipment of modern surgery rooms. They assist surgeons in performing complex procedures that would not be possible otherwise. However, despite the availability of more powerful and complex computer systems, their u ...
The necessity of applying fault-tolerant techniques to increase the reliability of future nano-electronic systems is an undisputed fact, dictated by the high density of faults that will plague these chips. The averaging and thresholding fault-tolerant tech ...
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse-grained locking and easier to use than fine-grained locking. However, STM im ...
This article describes an implementation of a basic multiprocessor system that exhibits replication and differentiation abilities on the POEtic tissue, a programmable hardware designed for bio-inspired applications. As for a living organism, whose existenc ...
Instruction-cache misses account for up to 40%; of execution time in online transaction processing (OLTP) database workloads. In contrast to data cache misses, instruction misses cannot be overlapped with out-of-order execution. Chip design limitations do ...
