Publications related to Self-aligned gate

Room-Temperature Negative Differential Resistance in Graphene Field Effect Transistors: Experiments and Theory

Mihai Adrian Ionescu, Arnaud Magrez, Antonios Bazigos, Laurent Syavoch Bernard, Pankaj Sharma

In this paper we demonstrate experimentally and discuss the negative differential resistance (NDR) in dual-gated graphene field effect transistors (GFETs) at room temperature for various channel lengths, ranging from 200 nm to 5 mu m. The GFETs were fabric ...

Amer Chemical Soc2015

Towards Functionality-Enhanced Devices: Controlling the Modes of Operation in Three-Independent-Gate Transistors (invited)

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Michele De Marchi

In this paper, we introduce the different modes of operation achievable with Three-Independent-Gate Field-Effect Transistors (TIGFETs) and report results on fabricated devices including: (i) the dynamic reconfiguration of the device polarity; (ii) t ...

2015

Wafer-Level Hysteresis-Free Resonant Carbon Nanotube Transistors

Mihai Adrian Ionescu, Ji Cao, Sebastian Thimotee Bartsch

We report wafer-level fabrication of resonant-body, carbon nanotube (CNT)field-effect transistors (FETs) in a dual-gate configuration. An integration density of >10(6) CNTFETs/cm(2), an assembly yield of >80%, and nanoprecision have been simultaneously obt ...

Amer Chemical Soc2015

Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon

Mihai Adrian Ionescu, Didier Bouvet, Antonios Bazigos, Elizabeth Buitrago Godinez, Sara Rigante, Paolo Scarbolo

Field-effect transistors (FETs) form an established technology for sensing applications. However, recent advancements and use of high-performance multigate metal-oxide semiconductor FETs (double-gate, FinFET, trigate, gate-all-around) in computing technolo ...

Amer Chemical Soc2015

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Hassan Ghasemzadeh Mohammadi

Controllable-Polarity Silicon Nanowire Transistors (CP-SiNWFETs) are among the promising candidates to complement or even replace the current CMOS technology in the near future. Polarity control is a desirable property that allows the on-line configuration ...

Institute of Electrical and Electronics Engineers2015

Silicon-on-Insulator Technology for Bioluminescence Imaging and Application to a Switching Photodetector

Maher Kayal, Adil Koukab, Denis Sallin, Nisrina Abdo

This paper analyzes some advantages of Silicon-on-Insulator (SOI) based photodetectors for bioluminescence imaging. It shows that SOI based sensors not only solve the bulk carriers problem, it can also act as a very selective spectral filter by acting as a ...

Ieee2015

Multiple Independent Gate FETs: How Many Gates Do We Need?

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Subhasish Mitra

Multiple Independent Gate Field Effect Transistors (MIGFETs) are expected to push FET technology further into the semiconductor roadmap. In a MIGFET, supplementary gates either provide (i) enhanced conduction properties or (ii) more intelligent sw ...

IEEE2015

Single Crystal Silicon UHF Wine-Glass Ring Resonator with HfO2 Solid Dielectric Gap embedded in a Field Effect Transistor

Mihai Adrian Ionescu, Montserrat Fernandez-Bolanos Badia, Emanuele Andrea Casu, Sara Rigante

In this work we present an ultra-high-frequency (UHF) single crystal silicon ring resonator with two embedded FETs. Electromechanical coupling is realized through a high-K, namely 10 nm HfO2, dielectric solid-gap sandwiched between the gate electrode and t ...

2014

Resolving the Memory Bottleneck for Single Supply Near-Threshold Computing

David Atienza Alonso, Mohamed Mostafa Sabry Aly

This paper focuses on a review of state-of-the-art memory designs and new design methods for near-threshold computing (NTC). In particular, it presents new ways to design reliable low-voltage NTC memories cost-effectively by reusing available cell librarie ...

IEEE/ACM Press2014

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Self-aligned gate

Room-Temperature Negative Differential Resistance in Graphene Field Effect Transistors: Experiments and Theory

Towards Functionality-Enhanced Devices: Controlling the Modes of Operation in Three-Independent-Gate Transistors (invited)

Wafer-Level Hysteresis-Free Resonant Carbon Nanotube Transistors

Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Graphene for Nanoelectronic Applications

Silicon-on-Insulator Technology for Bioluminescence Imaging and Application to a Switching Photodetector

Multiple Independent Gate FETs: How Many Gates Do We Need?

Single Crystal Silicon UHF Wine-Glass Ring Resonator with HfO2 Solid Dielectric Gap embedded in a Field Effect Transistor

Resolving the Memory Bottleneck for Single Supply Near-Threshold Computing

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Chat with Graph Search

Wafer-Level Hysteresis-Free Resonant Carbon Nanotube Transistors

Single Crystal Silicon UHF Wine-Glass Ring Resonator with HfO2 Solid Dielectric Gap embedded in a Field Effect Transistor

Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon

Graphene for Nanoelectronic Applications

Multiple Independent Gate FETs: How Many Gates Do We Need?

Room-Temperature Negative Differential Resistance in Graphene Field Effect Transistors: Experiments and Theory

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Towards Functionality-Enhanced Devices: Controlling the Modes of Operation in Three-Independent-Gate Transistors (invited)

Silicon-on-Insulator Technology for Bioluminescence Imaging and Application to a Switching Photodetector

Resolving the Memory Bottleneck for Single Supply Near-Threshold Computing