Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon

Field-effect transistors (FETs) form an established technology for sensing applications. However, recent advancements and use of high-performance multigate metal-oxide semiconductor FETs (double-gate, FinFET, trigate, gate-all-around) in computing technology, instead of bulk MOSFETs, raise new opportunities and questions about the most suitable device architectures for sensing integrated circuits. In this work, we propose pH and ion sensors exploiting FinFETs fabricated on bulk silicon by a fully CMOS compatible approach, as an alternative to the widely investigated silicon nanowires on silicon-on-insulator substrates. We also provide an analytical insight of the concept of sensitivity for the electronic integration of sensors. N-channel fully depleted FinFETs with critical dimensions on the order of 20 nm and HfO2 as a high-k gate insulator have been developed and characterized, showing excellent electrical properties, subthreshold swing, SS similar to 70 mV/dec, and on-to-off current ratio, l(on)/l(off) similar to 10(6), at room temperature. The same FinFET architecture is validated as a highly sensitive, stable, and reproducible pH sensor. An intrinsic sensitivity close to the Nernst limit, S = 57 mV/pH, is achieved. The pH response in terms of output current reaches S-out = 60%. Long-term measurements have been performed over 4.5 days with a resulting drift in time delta V-th/delta t = 0.10 mV/h. Finally, we show the capability to reproduce experimental data with an extended three-dimensional commercial finite element analysis simulator, in both dry and wet environments, which is useful for future advanced sensor design and optimization.

Tri-gate silicon nanowire transistors for ultra-low pH resolution and improved scalability

Enrico Accastelli

The scalability of on-chip analytical systems based on field-effect transistors as pH sensors is limited by the degradation of the signal to noise ratio when decreasing the device size. Nano-sized tri-gate transistors such as silicon nanowires and nanoribbons exhibit improved coupling with the electrolyte environment thanks to their tri dimensional structure. Even though in the framework of solid-state tri-dimensional transistors an enhancement of the channel con-ductivity is achieved by reducing the device width, so far the sensitivity performance of liquid-gate devices has been mostly considered in terms of threshold voltage readout. In pH sensing applications, however, the threshold voltage change is independent on the device size, thus overlooking the potential advantage derived from the improved electrical properties of nano sized devices. In this thesis, sensitivity characterization coupled with a comprehensive noise analysis has been performed on devices ranging from 50 nm to 70 µm in width and from 350 nm to 4250 nm in length. Such comprehensive characterization is made possible thanks to the employement indus-trial top down CMOS compatible technology, which ensures high control over process variation and enables the fabrication of nanowires with a wide range of widths and lengths. The results show that reducing the width below few hundreds of nanometers results in an increase of the conductivity properties of silicon nanoribbons, which ultimately improves the sensitivity with respect to surface charge, hence to pH. This enhanced sensitivity of nanoscaled devices can be further exploited within a multi wire configuration, in which the exposed surface is increased and the noise reduced. We provide experimental evidence that multi wire devices maximize the signal to noise ratio achieving, in the presented technology, a resolution of 0.0028 pH·µm2. This result could have a great impact on the improvement of the scalability of on-chip analytical systems requiring high pH resolution, such as DNA sequencing and quantitative PCR.

EPFL2014

Self-Assembled Liquid-Gated Zinc Oxide Nanowire Transistors

Vivek Pachauri

This thesis aims at the site-specific realization of self-assembled field-effect transistors (FETs) based on semiconducting Zinc oxide NWs and their application towards chemical and bio-sensing in liquid medium. At first, a solution based growth method for hierarchical ZnO nanostructures was devised in order to achieve synthesis of high quality ZnO NWs. This solution based growth method was then deployed for the growth of NWs from preferred sites on a substrate. In order to make a transistor, microelectrode pairs prewritten on a Si/SiO2 chip (4mm◊4mm) using standard photolithography procedure served as growth sites and also formed source and drain terminals. The NWs bridging these "source" and "drain" electrodes formed the transistor channel. The procedure here yields ZnO NWs in up to 100 percent of the positions available for growth. The site-specific self-assembled fabrication of ZnO NW FETs was evaluated in terms of scalability and applications. The procedure was extended from 4mm◊4mm silicon chips to large area silicon wafers (80mm◊80mm) and flexible substrates of Kapton polyimide of the same size. On the large area substrates this procedure yields ZnO NWs in up to 80 percent of the positions available for growth, which can be bettered. Furthermore, the method was also employed to fabricate ZnO NW FETs in situ in a microfluidic channel. For this purpose the precursor solution was let to flow on to the microelectrode pairs with the help of microfluidic channels assembled on top of the substrate. The substrate was heated locally under the microelectrode pairs to stimulate the NW growth. Thus a solution-based self-assembled fabrication of NW FETs was achieved locally inside a microfluidic channel. Microfluidic channels were made of silicon nitride (Si3N4) on top of Si/SiO2 chips and facilitated the characterization of FETs in liquid medium. Alternatively, microfluidic channels made of polydimethylsiloxane (PDMS) were used for characterization of transistor devices in liquids. In order to deploy FETs in liquids, the back-gate is replaced by a reference electrode (Ag/AgCl) and the potential is applied through a liquid surrounding the transistor channel (ZnO NW). The liquid surrounding the ZnO NW creates an electrochemical double layer (EDL) on the NW surface which in turn gives rise to the gate capacitance. The resulting gating effect can be used to modulate the NW conductance depending on the voltage applied through the liquid. The ZnO NW transistors showed a current modulation of up to 6 orders of magnitude, high field-effect mobilities (around 1.85 cm2/Vs) and sub-threshold slopes as low as 105 mV/decade. This is the first demonstration of liquid-gated FETs using ZnO NWs. The liquid-gated FETs are used as a basic device for further sensing trials in liquids. For this purpose, the FETs were functionalized with receptor molecules. These so called ion-selective FETs (ISFETs) were demonstrated as functional pH sensors for liquids with pH values from 6 to 10. The NWs functionalized with analyte-sensitive molecules on their surface are influenced electrically by the presence of analytes in the surrounding liquid. Any change in the amount of analyte present in the surrounding liquid is thus reflected in the electrical transport characteristics of the FET. 3-aminopropyltriethoxysilane (3-APTES) molecules were used to functionalize the ZnO NWs in order to construct the pH sensors. Subsequently, the realization of a biosensor based on ZnO NW transistors is demonstrated. Label-free direct detection of urea molecules was carried out from a solution of urea in buffer. ZnO NWs were electrochemically functionalized with the enzyme urease incorporated into an electro-polymerized polypyrrole matrix. Urease molecules act as specific receptors for urea molecules and catalyze an enzymatic reaction. This reaction causes a pH change in the vicinity of NWs, which is reflected in the field-effect characteristics of transistor. The performance of liquid-gated ZnO NW FETs used as chemical and biological sensor can be further improved by employing a metal gate in liquid medium. This was established by fabricating liquid gated metal-semiconductor FET (MESFET) based on ZnO NWs. ZnO NWs were decorated with metal nanoparticles (NPs) by using an electrochemical deposition method. The NPs were then used as metal gate and devices were characterized by applying a gate voltage on the NPs through the liquid. The realization of metal-semiconductor gate in liquids considerably improved the field-effect characteristics of liquid-gated FETs based on ZnO NWs. The realization of high performance liquid-gated transistors based on ZnO NWs thus constitutes a suitable platform for label-free detection of biomolecules and shows promise for future applications in chemical analysis and medical diagnostics.

EPFL2011

Multiple-Independent-Gate Field-Effect Transistors for High Computational Density and Low Power Consumption

Jian Zhang

Transistors are the fundamental elements in Integrated Circuits (IC). The development of transistors significantly improves the circuit performance. Numerous technology innovations have been adopted to maintain the continuous scaling down of transistors. With all these innovations and efforts, the transistor size is approaching the natural limitations of materials in the near future. The circuits are expected to compute in a more efficient way. From this perspective, new device concepts are desirable to exploit additional functionality. On the other hand, with the continuously increased device density on the chips, reducing the power consumption has become a key concern in IC design. To overcome the limitations of Complementary Metal-Oxide-Semiconductor (CMOS) technology in computing efficiency and power reduction, this thesis introduces the multiple- independent-gate Field-Effect Transistors (FETs) with silicon nanowires and FinFET structures. The device not only has the capability of polarity control, but also provides dual-threshold- voltage and steep-subthreshold-slope operations for power reduction in circuit design. By independently modulating the Schottky junctions between metallic source/drain and semiconductor channel, the dual-threshold-voltage characteristics with controllable polarity are achieved in a single device. This property is demonstrated in both experiments and simulations. Thanks to the compact implementation of logic functions, circuit-level benchmarking shows promising performance with a configurable dual-threshold-voltage physical design, which is suitable for low-power applications. This thesis also experimentally demonstrates the steep-subthreshold-slope operation in the multiple-independent-gate FETs. Based on a positive feedback induced by weak impact ionization, the measured characteristics of the device achieve a steep subthreshold slope of 6 mV/dec over 5 decades of current. High Ion/Ioff ratio and low leakage current are also simultaneously obtained with a good reliability. Based on a physical analysis of the device operation, feasible improvements are suggested to further enhance the performance. A physics-based surface potential and drain current model is also derived for the polarity-controllable Silicon Nanowire FETs (SiNWFETs). By solving the carrier transport at Schottky junctions and in the channel, the core model captures the operation with independent gate control. It can serve as the core framework for developing a complete compact model by integrating advanced physical effects. To summarize, multiple-independent-gate SiNWFETs and FinFETs are extensively studied in terms of fabrication, modeling, and simulation. The proposed device concept expands the family of polarity-controllable FETs. In addition to the enhanced logic functionality, the polarity-controllable SiNWFETs and FinFETs with the dual-threshold-voltage and steep-subthreshold-slope operation can be promising candidates for future IC design towards low-power applications.

EPFL2016