Multi-project chip (MPC), and multi-project wafer (MPW) semiconductor manufacturing arrangements allow customers to share mask and microelectronics wafer fabrication cost between several designs or projects. With the MPC arrangement, one chip is a combination of several designs and this combined chip is then repeated all over the wafer during the manufacturing. MPC arrangement produces typically roughly equal number of chip designs per wafer. With the MPW arrangement, different chip designs are aggregated on a wafer, with perhaps a different number of designs/projects per wafer. This is made possible with novel mask making and exposure systems in photolithography during IC manufacturing. MPW builds upon the older MPC procedures and enables more effective support for different phases and needs of manufacturing volumes of different designs/projects. MPW arrangement support education, research of new circuit architectures and structures, prototyping and even small volume production. Worldwide, several MPW services are available from companies, semiconductor foundries and from government-supported institutions. Originally both MPC and MPW arrangements were introduced for integrated circuit (IC) education and research; some MPC/MPW services/gateways are aimed for non-commercial use only. Selecting the right service platform at the prototyping phase ensures gradual scaling up production via MPW services taking into account the rules of the selected service. MPC/MPW arrangements have also been applied to microelectromechanical systems (MEMS), integrated photonics like silicon photonics fabrication and microfluidics. A refinement of MPW is multi-layer mask (MLM) arrangement, where a limited number of masks (e.g. 4) are changed during manufacturing at exposure phase. The rest of the masks are the same from the chip to chip on the whole wafer.
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