Formally Verified Chisel Designs

In course

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Description

This lecture covers the concept of formally verifying Chisel designs using SMT solvers. It explains Chisel as a hardware construction language in Scala, the use of SMT solvers to prove hardware design properties, and examples like delayed assertions and proofs by induction on state. It also delves into formal verification of communication protocols like AXI4, emphasizing the importance of loop invariants, preconditions, and postconditions in digital circuit design.

Instructor

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Official source

https://mediaspace.epfl.ch/media/0_3ro4fbvi

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Ontological neighbourhood

Computer engineering

Hardware engineering: Microprocessors, Application-specific integrated circuit

Theoretical computer science

Programming language theory: High-level programming languages

Theory of computation: Automata theory

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