Sequential Logic Circuits in VHDL

Description

This lecture covers the modeling of sequential logic circuits in VHDL, focusing on processes, control instructions, flip-flops, counters, and registers. It explains the advanced sequential instructions in VHDL, including the use of processes, sequential flow, and parallel execution. The lecture also discusses the rules of operation for processes, the wait instruction syntax, and control instructions like IF, CASE, and loop structures. Additionally, it delves into the synthesis of flip-flops such as RS, D, and JK, as well as counters like modulo 10 and modulo N. The lecture concludes with the synthesis of shift registers in VHDL.

In MOOC

Official source

https://mediaspace.epfl.ch/media/0_8ftvs4j3

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