Path-Delay Fault Testing

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Digital Logic Circuits: CMOS and Verilog Design

Discusses digital logic circuits, CMOS technology, and Verilog for circuit design.

MOS Transistor: Quick Recap of a Simple Model

Covers the Shockley MOS transistor model, CMOS logic gates, transistor operation, design parameters, and I-V characteristics.

Logic Synthesis: Designing Efficient Digital Circuits

Discusses logic synthesis techniques for designing efficient digital circuits from functional descriptions and truth tables.

Complex Gates: Exercise-2 Solution

Covers the design of complex logic gates in VLSI.

Logic Systems: Basics and Operators

Covers the basics of logic systems, including digital versus analog circuits, logic operators, truth tables, and Boolean algebra.

Logical Circuits: Basics

Covers logical circuits, gates, and their combinations to perform basic operations on bits, including adding binary numbers.

Logic Gates and Hazard Elimination

Explores logic gates, hazard elimination, ALUs, counters, and shift registers in semiconductor technology.

Logic Systems: Technology Overview

Provides an overview of the technology behind logic gates, covering TTL and CMOS families and addressing static and dynamic hazards, gated clocks, and switch debouncing.

Transistor Logic Gates: TTL vs CMOS

Compares BJT and MOSFET in logic systems, focusing on TTL vs CMOS technologies.

Karnaugh Maps: Grouping Rules and Optimization

Explores Karnaugh map representations, grouping rules, optimization, and TTL gate technology.