Lecture
This lecture focuses on the analysis of MOSFET transistors, specifically when the gate and drain are short-circuited. The instructor begins by correcting exercises related to this configuration, explaining the implications for an NMOS transistor. The source is grounded, and the relationship between gate voltage (VG) and drain voltage (VD) is established, leading to the conclusion that VD equals VG. The discussion includes the calculation of saturation voltage (VDSAT) and its dependence on the threshold voltage (VT). The instructor emphasizes that the transistor operates in saturation mode, resulting in a quadratic output curve when VD exceeds VT. Practical measurement techniques are described, including the application of a variable voltage source to both the gate and drain, which allows for the observation of the output characteristics. The lecture concludes with a graphical representation of the current-voltage relationship, highlighting the ability to determine the threshold voltage from the observed data.