Lecture

SR and D Latches: Logic Systems

In course

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Description

This lecture covers the implementation and truth table of SR latches, explaining why one of the four input combinations is prohibited due to metastable conditions. It then introduces D-latches, detailing how they keep the input value when a specific edge occurs. The lecture also discusses D flip-flops, emphasizing their memorization modes and sensitivity to edges, clocks, and enables.

Instructor

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Official source

https://mediaspace.epfl.ch/media/0_hpy1xuac

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Ontological neighbourhood

Electrical engineering

Electronic engineering: Digital electronics

Logic

Classical logic: First-order logic

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