Memory Consistency: Basics and Models

This lecture covers the fundamental concepts of memory consistency in multiprocessor systems, starting with the problem of hardware cache coherence and the distinction between coherence and consistency. It delves into the differences between memory coherence and memory consistency, illustrating the behavior of read and write operations across different memory addresses. The lecture explores the challenges of implementing sequential consistency and the need for a rigorous memory model to guide system behavior. It also discusses the impact of relaxed consistency models like Processor Consistency (PC) and Weak Consistency, highlighting the trade-offs between ordering constraints and performance.