Lecture

Sequential Circuits: Synthesis and Retiming

Description

This lecture covers the structural model for sequential circuits, synchronous logic networks, synchronous delay annotation, approaches to sequential synthesis including retiming, legal retiming, refined analysis, and the minimum cycle-time retiming problem. Examples and algorithms are provided to illustrate the concepts.

About this result
This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.