Lecture

Sequential Circuits: Optimization and Retiming

Description

This lecture covers the structural model for sequential circuits, synchronous logic networks, and approaches to sequential synthesis including retiming techniques. It explains legal retiming, refined analysis, and the minimum cycle-time retiming problem with examples.

This video is available exclusively on Mediaspace for a restricted audience. Please log in to MediaSpace to access it if you have the necessary permissions.

Watch on Mediaspace
About this result
This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.