This lecture covers relaxation-based retiming techniques, which involve adjusting the timing of signals in a circuit to optimize cycle time or register area. It explains the iterative approach to retiming, minimum area retiming, and retiming under timing constraints. The lecture also discusses other related problems like retiming pipelined circuits, peripheral retiming, and wire pipelining. Additionally, it explores state extraction methods, including state encoding, reachability analysis, and state space traversal using Binary Decision Diagrams (BDDs). The instructor emphasizes the importance of managing the exponential growth of state space size in optimization and verification processes.
This video is available exclusively on Mediaspace for a restricted audience. Please log in to MediaSpace to access it if you have the necessary permissions.
Watch on Mediaspace