Lecture

Fault Simulation in VLSI Testing

Description

This lecture covers fault simulation in VLSI testing, where a fault simulator predicts the behavior of a faulty circuit to determine test quality, improve product quality, and guide test pattern generation. It explains fault coverage, fault models, fault dropping, fault sampling, algorithms for fault simulation, types of fault simulators (serial, parallel, deductive, concurrent), and the implementation of fault models in the simulator. The deductive fault simulation process, propagation rules for main Boolean gates, and compact representation of propagation rules are also discussed, along with examples to illustrate fault propagation through circuits.

About this result
This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.