CMOS Gates and Logic Systems

Related lectures (31)

Page 3 of 4

Covers the Shockley MOS transistor model, CMOS logic gates, transistor operation, design parameters, and I-V characteristics.

Explains the operation of NMOS structures and their behavior in various regimes, including sub-threshold, linear, and saturation.

Covers the design of low-power analog CMOS integrated circuits and the challenges of technology scaling in semiconductor industry.

Covers the EKV MOS Transistor Model, focusing on the charge-based model and its applications.

Explores the fabrication processes of silicon wafers and the operation of NPN bipolar transistors and MOSFETs.

Explores the historical evolution of CMOS technology, MOSFET analysis, and its applications in digital and analog electronics.

Delves into the evolution of transistors, the impact of quantum effects on nano-devices, and the functionality of memristors.

Introduces finite state machines, covering basics, design, and practical applications like decoders and encoders.

Explores the construction, delay, and sizing of CMOS logic gates, including strategies for transistor sizing and dealing with fan-in.

Revisits the modeling of the MOS transistor for low-voltage and low-power analog circuit design, focusing on the EKV charge-based model.