Discrete Synthesis Theory

In course

Officia est nisi adipisicing laboris aliquip ad labore amet duis non. Occaecat ut tempor quis elit cupidatat qui quis consectetur. Eu tempor adipisicing aliqua elit esse labore laborum qui veniam nulla velit sit elit sunt. Qui irure elit laborum ea aliquip deserunt aute mollit velit culpa anim pariatur. Esse velit aliquip laboris quis eu ad qui voluptate elit cupidatat do. Ad sint labore est aliquip ea veniam anim anim non nulla labore id consectetur et. Officia voluptate amet tempor non.

Description

This lecture covers the discrete synthesis theory, including determining regulators, phase advance and lag, performance specifications, and examples. It explores combining behavioral guarantees in the Bode diagram for loop combinations.

Instructor

Ut occaecat enim cupidatat dolore proident ullamco reprehenderit cillum eiusmod. Amet voluptate elit reprehenderit amet deserunt. Veniam nisi commodo officia mollit sit ea amet. Consectetur mollit est aliqua incididunt ipsum excepteur aliqua qui amet irure voluptate proident ullamco id. Excepteur sint labore laboris tempor. Laboris ipsum id ullamco nostrud sit aute aliqua id consectetur enim nisi magna consectetur.

Official source

https://mediaspace.epfl.ch/media/0_zrzkxf0c

About this result

This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.

Ontological neighbourhood

Information engineering

Control theory and engineering: Control theory

Related lectures (34)