Publications by Ties Jan Henderikus Kluter

Implementation of Dynamic SISD-SIMD Integer Dividers

Ties Jan Henderikus Kluter, Gianluca Radi

Digital division is a pivotal operation in a number of domains, such as scientific computation, cryptography, digital signal processing, and machine learning, and has been broadly researched in the past decades. However, the increasing demand for efficient ...

Institute of Electrical and Electronics Engineers2025

Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage

Edoardo Charbon, Paolo Ienne, Ties Jan Henderikus Kluter, Samuel Burri, Philip Brisk

Instruction set extensions (ISEs) improve the performance and energy consumption of application-specific processors. ISEs can use architecturally visible storage (AVS), localized compiler-controlled memories, to provide higher I/O bandwidth than reading da ...

Assoc Computing Machinery2014

Way Stealing: A Unified Data Cache and Architecturally Visible Storage for Instruction Set Extensions

Edoardo Charbon, Paolo Ienne, Ties Jan Henderikus Kluter, Philip Brisk

Way Stealing is a simple architectural modification to a cache-based processor that increases the data bandwidth to and from application-specific instruction set extensions (ISEs), which increase performance and reduce energy consumption. Way Stealing offe ...

Institute of Electrical and Electronics Engineers2014

Optically-Clocked Instruction Set Extensions for High Efficiency Embedded Processors

Edoardo Charbon, Ties Jan Henderikus Kluter, Claudio Favi, Christian Mester

We propose a technique to localize computation in Instruction Set Extensions (ISEs) that are clocked at very high speed with respect to the processor. In order to save power, data to and from Custom Instruction Units (CIUs) is synchronized via an optical s ...

2012

Architectural Support for Coherent Architecturally Visible Storage in Instruction Set Extensions

Ties Jan Henderikus Kluter

When it comes to performance, embedded systems share many problems with their higher-end counterparts. The growing gap between top processor frequency and memory access speed, the memory wall, is one such problem. Driven, in part, by low energy consumption ...

EPFL2010

MPSoC Design using Application-Specific Architecturally Visible Communication

Edoardo Charbon, Paolo Ienne, Ties Jan Henderikus Kluter, Philip Brisk

This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide high-throughput communication for streaming applications. Producer/consumer relationships map poorly onto cache-based MPSo ...

Springer-Verlag2009

Way Stealing: Cache-assisted Automatic Instruction Set Extensions

Edoardo Charbon, Paolo Ienne, Ties Jan Henderikus Kluter, Philip Brisk

This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Extensions (ISEs). Way Stealing provides more bandwidth to the ISE-logic than the ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

Single-Photon Synchronous Detection

Edoardo Charbon, Ties Jan Henderikus Kluter, Cristiano Niclass, Claudio Favi, Frédéric Monnier

Phase and intensity of light are detected simultaneously using a fully digital imaging technique: single-photon synchronous detection. This approach has been theoretically and experimentally investigated in this paper. We designed a fully integrated camera ...

2009

A 128x128 Single-Photon Imager with on-Chip Column-Level 10bit Time-to-Digital-Converter Array

Edoardo Charbon, Ties Jan Henderikus Kluter, Cristiano Niclass, Marek Gersbach, Claudio Favi

2008

Speculative DMA for Architecturally Visible Storage in Instruction Set Extensions

Edoardo Charbon, Paolo Ienne, Ties Jan Henderikus Kluter, Philip Brisk

2008