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Srinivasan Murali

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Srinivasan Murali

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Method to design network-on-chip (noc)-based communication systems

Temperature Control of High Performance Multicore Platforms Using Convex Optimization

Network-On-Chip Design and Synthesis Outlook

Designing Routing and Message-Dependent Deadlock Free Networks on Chips

Timing-Error-Tolerant Network-on-Chip Design Methodology

Synthesis of Predictable Networks-on-Chip Based Interconnect Architectures for Chip Multi-Processors

An Application-Specific Design Methodology for On-chip Crossbar Generation

Temperature-Aware Processor Frequency Assignment for MPSoCs Using Convex Optimization

NoC Design and Implementation in 65 nm Technology

Bringing NoCs to 65nm