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Mohammad Najmzadeh

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Mohammad Najmzadeh

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Electron mobility extraction in triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm

Mobility Extraction Assessment in GAA Si NW JL FETs with Cross-Section Down to 5 nm

Gate-all-around buckled dual Si nanowire nMOSFETs on bulk Si for transport enhancement and digital logic

Multi-gate Si nanowire MOSFETs

Accumulation-mode gate-all-around Si nanowire nMOSFETs with sub-5 nm cross-section and high uniaxial tensile strain

Multigate Buckled Self-Aligned Dual Si Nanowire MOSFETs on Bulk Si for High Electron Mobility

Local volume depletion/accumulation in GAA Si nanowire junctionless nMOSFETs

Uniaxially tensile strained accumulation-mode gate-all-around Si nanowire nMOSFETs

Accumulation-Mode GAA Si NW nFET with sub-5 nm cross-section and high uniaxial tensile strain

Local stressors to accommodate 1.2 to 5.6 GPa uniaxial tensile stress in suspended gate-all-around Si nanowire nMOSFETs by elastic local buckling