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Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.
The aim of this thesis is to implement, analyze and improve the selected low noise clock
generation and distribution techniques for ADC implementations. The thesis is divided into
two parts. The first part focuses on the sampling phase generation and distr ...
The discrete time analysis of the phase detector linear range extension in the first and the second order sub sampling phase-locked loop (SSPLL) is presented. The aim is to understand how much the stability and the pull-in range are affected by the linear ...
The analysis of the effect of sub-sampling phase detector (SSPD) timing nonidealities on Type-I sub-sampling phase-locked loop (SSPLL) is presented. The nonidealities considered are the delay between the complementary sampling clocks and the propagation de ...