Person
Andrea Guerrieri
Related publications (19)
Where is M-theory in the space of scattering amplitudes?
We use the S-matrix bootstrap to carve out the space of unitary, analytic, crossing symmetric and supersymmetric graviton scattering amplitudes in nine, ten and eleven dimensions. We extend and improve the numerical methods of our previous work in ten dime ...
SPRINGER2023Numerical data for scattering amplitudes of Neutral Goldstone bosons in 4d.
Andrea Guerrieri, Denis Karateev, Kelian Philippe Häring
Numerical data for scattering amplitudes of Goldstone bosons in d=4 obtained by solving various optimisation problems. The data is stored in .m files. Mathematica notebook is provided for loading and plotting the data. ...
EPFL Infoscience2023Bounds on scattering of neutral Goldstones
Andrea Guerrieri, Denis Karateev, Kelian Philippe Häring
We study the space of scattering amplitudes of neutral Goldstone bosons in four space-time dimensions. We establish universal bounds on the first two non-universal Wilson coefficients of the low energy Effective Field Theory (EFT) for such particl ...
2023An Iterative Method for Mapping-Aware Frequency Regulation in Dataflow Circuits
Andrea Guerrieri, Lana Josipovic, Carmine Rizzi
Dataflow circuits promise to overcome the scheduling limitations of standard HLS solutions. However, their performance suffers due to timing overheads caused by their handshake communication protocol. Current pipelining solutions fail to account for logic ...
New York2023Resource Sharing in Dataflow Circuits
Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet
To achieve resource-efficient hardware designs, high-level synthesis (HLS) tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed in conjunction with operation scheduling to ensure th ...
New York2023Resource Sharing in Dataflow Circuits
Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet
To achieve resource-efficient hardware designs, HLS tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed together with operation scheduling to ensure the best possible unit usage at ...
IEEE2022From C/C plus plus Code to High-Performance Dataflow Circuits
Paolo Ienne, Andrea Guerrieri, Lana Josipovic
High-level synthesis (HLS) tools typically generate statically scheduled datapaths. Static scheduling implies that the resulting circuits have a hard time exploiting parallelism in code with potential memory dependences, with control dependences, or where ...
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022Optimizing Lattice-based Post-Quantum Cryptography Codes for High-Level Synthesis
Francesco Regazzoni, Andrea Guerrieri, Andres Upegui
High-level synthesis is a mature Electronics Design Automation (EDA) technology for building hardware design in a short time. It produces automatically HDL code for FPGAs out of C/C++, bridging the gap from algorithm to hardware. Nevertheless, sometimes th ...
IEEE2022A Comprehensive Timing Model for Accurate Frequency Tuning in Dataflow Circuits
Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Carmine Rizzi
The ability of dataflow circuits to implement dynamic scheduling promises to overcome the conservatism of static scheduling techniques that high-level synthesis tools typically rely on. Yet, the same distributed control mechanism that allows dataflow circu ...
IEEE COMPUTER SOC2022Unleashing Parallelism in Elastic Circuits with Faster Token Delivery
Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Ayatallah Ahmed Gamal Kamal Elakhras
High-level synthesis (HLS) is the process of automatically generating circuits out of high-level language descriptions. Previous research has shown that dynamically scheduled HLS through elastic circuit generation is successful at exploiting parallelism in ...
IEEE COMPUTER SOC2022