Publications by Alessandro Tempia Calvino

Area-Oriented Resubstitution For Networks of Look-Up Tables

Giovanni De Micheli, Andrea Costamagna, Alessandro Tempia Calvino

This paper addresses the challenge of reducing the number of nodes in Look-Up Table (LUT) networks with two significant applications. First, Field-Programmable Gate Arrays (FPGAs) can be modelled as networks of LUTs, and minimizing the node count is impera ...

2025

Area-Oriented Optimization After Standard-Cell Mapping

Giovanni De Micheli, Andrea Costamagna, Alessandro Tempia Calvino

We address the problem of minimizing the area of circuits mapped to a technology library, with or without delay constraints. While traditional methods optimize first a technology-independent representation and then perform technology mapping to a library, ...

Association for Computing Machinery2025

Technology Legalization and Optimization for Adiabatic Quantum-Flux Parametron

Giovanni De Micheli, Alessandro Tempia Calvino

Adiabatic quantum-flux parametron (AQFP) is an energy-efficient superconducting technology. Before physical design can be performed, AQFP technology mapping involves not only mapping logic into supported gate types but also legalizing the circuit to fulfil ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2025

Back-end-aware Fault-tolerant Quantum Oracle Synthesis

Giovanni De Micheli, Mingfei Yu, Alessandro Tempia Calvino

Quantum oracle synthesis involves compiling arbitrary Boolean functions into quantum circuits using specific quantum gates supported by the target quantum computer. The Clifford+T gate library is particularly common in fault-tolerant quantum computing syst ...

Association for Computing Machinery2025

Algebraic and Boolean Methods for SFQ Superconducting Circuits

Giovanni De Micheli, Alessandro Tempia Calvino

Rapid single-flux quantum (RSFQ) is one of the most advanced and promising superconducting logic families, offering exceptional energy efficiency and speed. RSFQ technology requires delay registers (DFFs) and splitter cells to satisfy the path-balancing an ...

2024

Enhancing Delay-Driven LUT Mapping with Boolean Decomposition

Giovanni De Micheli, Alessandro Tempia Calvino

Ashenhurst-Curtis decomposition (ACD) is a decomposition technique used, in particular, to map combinational logic into lookup tables (LUTs) structures when synthesizing hardware designs. However, available implementations of ACD suffer from excessive comp ...

2024

Scalable Logic Rewriting Using Don’t Cares

Giovanni De Micheli, Alessandro Tempia Calvino

Logic rewriting is a powerful optimization technique that replaces small sections of a Boolean network with better implementations. Typically, exact synthesis is used to compute optimum replacement on-the-fly, with possible support for Boolean don't cares. ...

2024

Technology Mapping and Optimization Algorithms for Logic Synthesis of Advanced Technologies

Alessandro Tempia Calvino

Logic synthesis is a key component of electronic design automation (EDA) tools, essential for designing high-performance, compact, and power-efficient integrated circuits. The continuous downscaling of complementary metal-oxide-semiconductor (CMOS) technol ...

EPFL2024

On the Synthesis of High-performance Homomorphic Boolean Circuits

Giovanni De Micheli, Mingfei Yu, Alessandro Tempia Calvino

The rapid growth of cloud computing has intensified the need for secure data outsourcing solutions. Fully homomorphic encryption (FHE) offers a promising approach by enabling computations on encrypted data without exposing the plaintext. This paper advance ...

Association for Computing Machinery, Inc2024

In Medio Stat Virtus: Combining Boolean and Pattern Matching

Giovanni De Micheli, Alessandro Tempia Calvino, Gianluca Radi

Technology mapping transforms a technology-independent representation into a technology-dependent one given a library of cells. This process is performed by means of local replacements that are extracted by matching sections of the subject graph to library ...

IEEE2024