Advancing towards well-controlled full-wafer nanostencil lithography

The endeavour to develop nanodevices demands for patterning methods in the nanoscale. To bring nanodevices to the market, there is a need for fast, low-cost replication nanopatterning methods. In addition, an increased flexibility of the nanopatterning methods is important for the engineering of multimaterial and multifunctional nano/micro-electro-mechanical systems (NEMS/MEMS), such as polymer-based electronic and sensor devices, 3D microfluidic systems, and bio-analytical systems. A series of alternative, complementary surface micro/nanopatterning methods are currently being developed, e.g. local printing of molecular layers (soft-lithography), local fluidic dispensing (NADIS), and shadow-mask deposition (nanostencil lithography). These methods rely on locally adding material onto the substrate without the need for resist layers and etching steps. Nanostencil lithography is a resistless, single step patterning method based on direct, local deposition of material on an arbitrary surface through a solid-state membrane, e.g. a 200-nm thick silicon nitride (SiN) membrane. We present two new stencil membrane geometries and associated MEMS processes that allow for advancing further towards a well-controlled full-wafer (100 mm) nanostencil process for reproducible, high-throughput, large-area nanopatterning of mesoscopic structures (10^9-10^3 m). In fact, the major challenges for well-controlled and reproducible nanostencil lithography are to control stress-induced membrane deformation, clogging of membrane apertures and the gap between stencil and substrate. To limit pattern deformation and blurring, i.e. reduced sharpness of edges and limited spatial detail, we have developed two schemes to incorporate in-situ, local stabilization structures in the stencil membranes. These stabilization structures are adaptable to the membrane apertures and they do not interfere with the material flux during deposition. The stabilized membranes show improved membrane stability (i.e. reduced out-of-plane deformation) up to 94%, resulting in an improved pattern definition of stencil-deposited structures. We have also systematically characterized and will present the clogging of membrane apertures as a function of their size and deposited material. Cu and Ti thin-film deposition through 500-nm thick SiN stencil membranes resulted in half of the film thickness (that was evaporated onto the membrane surface) deposited at the inner sides of the membrane apertures. The stabilized membranes are easier to clean with a reduced risk of damage, increasing the reusability of the stencils. Furthermore, the influence of the gap between stencil and substrate on the deposited structures was determined quantitatively. We have studied patterning by stencil lithography of metals (Al, Au, Bi, Cr, Ti, Cu) on various surfaces (Si, SiO2, SU-8, PDMS, PMMA, freestanding SiN cantilevers, curved surfaces, CMOS chips, and self-assembled monolayers (SAM)) for different applications (nanomechanical devices, (molecular) electronic devices, nanoscale Hall-sensor devices, 3D microfluidic systems).

High-throughput surface patterning with wafer-sized stencils fabricated by a DUV/MEMS process

Jürgen Brugger, Marc Antonius Friedrich van den Boogaart

The endeavour to develop nanodevices demands for patterning methods in the nanometer scale. The continuous improvement in lithography methods based on deep UV (DUV), X-ray, or electron beam exposure allow for further progress in integrated circuit hardware manufacturing for the coming years. To bring nanodevices to the market, however, there is a need for fast, low-cost replication nanopatterning methods. In addition, an increased flexibility of the nanopatterning methods is important for the engineering of multimaterial and multifunctional nano/micro-electro-mechanical systems (NEMS/MEMS), such as polymer-based electronic and sensor devices, 3D microfluidic systems, and bio-analytical systems. The above-mentioned high-end patterning methods are all based on photolithography and etching, limiting the flexibility in substrate and material combinations. In addition, they have the drawback of the use of high-cost equipment. A series of alternative, complementary surface patterning methods are currently being developed that do not rely on photoresist exposure and thin-film etching steps, e.g. local printing of molecular layers (soft-lithography) and shadow-mask deposition (nanostencil patterning). The nanostencil method is a resistless patterning method based on direct, local deposition of material on an arbitrary surface through a solid-state silicon nitride (SiN) membrane , . We present here the advances towards a full-wafer (100 mm) DUV/MEMS-based nanostencil to allow high-throughput, large-area nanopatterning of mesoscopic structures (10^9 - 10^5 m). The mesoscopic patterns were first defined by a 4× reduced projection exposure using an ASML wafer stepper and then transferred into a SiN layer by means of reactive ion etching (RIE). The membranes were released by wafer-through etching using potassium hydroxide (KOH). Figure 1 shows the mid-process details of 200 nm DUV patterns after the RIE transfer into the 500-nm thick SiN layer. Patterning of nano-scale structures using stencils allows for a large choice of materials and surfaces to be nanopatterned, since it is a non-contact method and no etch steps need to be applied. We have studied the nanopatterning of metals (Al, Au, Bi, and Cr) on various surfaces (silicon, oxides, freestanding SiN cantilevers, and self-assembled monolayers (SAM)) for different applications (molecular electronics, nano-mechanical devices with a 90 MHz resonance frequency , as well as nano-scale Hall-sensor devices). Unconventional substrates for (Bio) MEMS and NEMS have also been applied such as highly ordered pyrolytic graphite (HOPG), polydimethylsiloxane (PDMS), and SU-8.

2004

Characterisation and applications of stencil lithography

Jürgen Brugger, Nao Takano, Marc Antonius Friedrich van den Boogaart, Oscar Vazquez Mena

Increased flexibility of patterning methods is important for the engineering of multimaterial and multifunctional nano/micro-electro-mechanical systems (NEMS/MEMS), such as polymer-based electronic and sensor devices, 3D microfluidic systems, and bio-analytical systems. Stencil lithography is a good candidate as it is a resistless, single step patterning method based on direct, local deposition of material on an arbitrary surface through a solid-state membrane, e.g. a 200-nm thick silicon nitride (SiN) membrane. We present two new stencil membrane stabilisation geometries and associated MEMS processes that allow for advancing further towards a well-controlled full-wafer (100 mm) nanostencil process for reproducible, high-throughput, large-area nanopatterning of mesoscopic structures (10-9 - 10-3 m). In fact, the major challenges for well-controlled and reproducible nanostencil lithography are to control stress-induced membrane deformation, clogging of membrane apertures and the gap between stencil and substrate. The stabilized membranes show improved membrane stability (i.e. reduced out-of-plane deformation) up to 94%, resulting in an improved pattern definition of stencil-deposited structures. We have also systematically characterized the clogging of membrane apertures and the influence of the gap between stencil and substrate on the deposited structures as a function of aperture size and deposited material. A method is presented to recover nominal dimensions of stencil-deposited structures over a gap. To integrate nanomechanical structures with CMOS circuits, stencil lithography was used as a clean, CMOS-compatible method to define the mechanical structures on a CMOS circuit, using the stencildeposited metal patterns as a mask for silicon reactive ion etching (RIE). When the stencil and the CMOS wafer are put in contact, a gap exists between the layer to be structured and the stencil. We have been able to correct the blurring effect by developing a controlled dry Al etch process. The results obtained provide a clear remedy to overcome one of the major challenges in nanostencil-based surface patterning. Stencil lithography is also used in the development of novel nanotemplates of anodic porous alumina (APA). To obtain APA structures with high regularity, a method to pre-pattern the surface of the aluminum substrate before conventional anodization is a prerequisite. A pre-patterned arrangement of dots or holes on Al plates is obtained by evaporation, sputtering, electrodeposition, or chemical etching through stencils. It should result in a high regularity mono-domain APA with pore spacing comparable with the visible wavelength for large area photonic crystals for optical applications and luminescence devices.

2005

Application of Microstencil Lithography on Polymer Surfaces for Microfluidic Systems with Integrated Microelectrodes

Jürgen Brugger, Nao Takano, Marc Antonius Friedrich van den Boogaart

Microfluidic systems with incorporated microelectrodes are adopted in a variety of applications in life sciences. However, most of micro-electro-fluidic devices are fabricated based on silicon and silicon related materials micromachining processes, which are still expensive for disposable or semi-disposable sensing devices. Plastics and other polymer materials are advantageous to be used as substrates of microfluidic systems in order to realize a low-cost production process of devices, since these materials can be easily structured by e.g. hot-embossing, injection molding or thermal forming with excellent reproducibility. However, the lithographical process of microelectrode fabrication on plastic substrates is one of the critical issues, because many of these materials cannot withstand organic solvents which are unavoidable during conventional photolithography processes. Microstencil lithography, i.e., local deposition of micrometer scale metal patterns through small shadow masks, is a promising method for metal micropattern definition on plastic substrates that are not feasible for solvent-based photoresist technology. Since microstencil lithography is a resistless, single-step direct vacuum patterning method, it enables us to simplify the device fabrication process as well. Thus, we propose to apply microstencil lithography to fabricate microelectrodes onto plastic substrates as part of a low-cost production process of microfluidic devices. However, microstencil lithography is faced with several possible drawbacks. Therefore, we focused on two specific issues accompanying microstencil lithography, which are expected to affect on micro electro fluidic device fabrication process when considered as low-cost, reproducible alternative to standard lithography on plastic substrates: clogging and blurring. One of the main limitations of microstencil lithography is that the method is associated with gradual aperture clogging. To suppress the clogging phenomenon, coating stencils with self-assembled monolayers (SAM) is highly helpful, by which the useful life time of stencils can be extended. But in this study, we traced the clogging of micro-apertures without SAM coating by an observation of the stencil apertures and deposited microstructures after each evaporation step in order to asses the basic feasibility of microstencil lithography. From the series of observation, it was determined that approximately 50 % of the thickness of the evaporated metals (Ti, Cu) was deposited at the side walls of the stencil apertures, i. e., when 200 nm of Ti was evaporated through the microstencil, the thickness of deposited Ti at the side wall of the aperture was 0.1 um. Similar values were observed when Cu was used as a deposited material. The progress of clogging is clearly visible in an SEM image, in which the corresponding microstencil aperture was observed from the side having faced the substrate during the evaporation. These results suggest that the microstencils can be used repeatedly even without a cleaning treatment when the device specifications allow some micrometer tolerance of the electrode size. The other drawback of stencil lithography is related to the gap presence between the stencil and the substrate. We will also present quantitative values of gap induced clogging and discuss the blurring mechanism of deposited structures based on a simplified geometrical model.

2006