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Ultra-Low Power 32-bit Pipelined Adder Using Subthreshold Source-Coupled Logic with 5fJ/stage PDP

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Ultra-Low Power 32-bit Pipelined Adder Using Subthreshold Source-Coupled Logic with 5fJ/stage PDP

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ECOS: Integrated and practical energy planning for new districts

Simulation of Urban Energy Flow: A Graph Theory Inspired Approach

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Current Sensing Completion Detection for Subthreshold Asynchronous Circuits

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