Publication

Mechanisms for cooperative shared memory

Related publications (71)

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

The Complexity of Obstruction-Free Implementations

Rachid Guerraoui, Hagit Albo Attiya

Obstruction-free implementations of concurrent ob jects are optimized for the common case where there is no step contention, and were recently advocated as a solution to the costs associated with synchronization without locks. In this paper, we study this ...

2009

Diffusion LMS algorithms with information exchange

Ali H. Sayed

We consider the problem of distributed estimation, where a set of nodes are required to collectively estimate some parameter of interest. We motivate and propose new versions of the diffusion LMS algorithm, including a version that outperforms previous sol ...

IEEE2008

The Complexity of Distinguishing Distributions

Serge Vaudenay, Thomas Baignères

Cryptography often meets the problem of distinguishing distributions. In this paper we review techniques from hypothesis testing to express the advantage of the best distinguisher limited to a given number of samples. We link it with the Chernoff informati ...

Springer2008

A profiling framework for high level design space exploration for memory and system architectures

In 1971, the first microprocessor produced in mass production had 2300 transistor and was able to compute 60'000 operations per second at 740 kHz. Nowadays, even a common gaming console uses a central unit including 243 millions of transistors running at 4 ...

EPFL2007

Reduced complexity attacks on the alternating step generator

Willi Meier, Shahram Khazaei, Simon Fischer

In this paper, we present some reduced complexity attacks on the Alternating Step Generator (ASG). The attacks are based on a quite general framework and mostly benefit from the low sampling resistance of the ASG, and of an abnormal behavior related to the ...

Springer-Verlag New York, Ms Ingrid Cunningham, 175 Fifth Ave, New York, Ny 10010 Usa2007

Bayesian Factorial Linear Gaussian State-Space Models for Biosignal Decomposition

Silvia Chiappa

We discuss a method to extract independent dynamical systems underlying a single or multiple channels of observation. In particular, we search for one dimensional subsignals to aid the interpretability of the decomposition. The method uses an approximate B ...

2007

The Perfectly-Synchronized Round-based Model of Distributed Computing

Rachid Guerraoui, Bastian Pochon

The perfectly-synchronized round-based model provides the powerful abstraction of crash-stop failures with atomic and synchronous message delivery. This abstraction makes distributed programming very easy.We describe a technique to automatically transform ...

2007

Reducing Time Complexity in RFID Systems

Gildas Avoine, Philippe Oechslin, Etienne Dysli

Radio frequency identification systems based on low-cost computing devices is the new plaything that every company would like to adopt. Its goal can be either to improve the productivity or to strengthen the security. Specific identification protocols base ...

2006

Synchronizing without Locks is Inherently Expensive

Rachid Guerraoui, Hagit Albo Attiya

It has been considered bon ton to blame locks for their fragility, especially since researchers identified obstruction-freedom: a progress condition that precludes locking while being weak enough to raise the hope for good performance. This paper attenuate ...

2006

Routing Aware Switch Hardware Customization for Networks on Chips

Giovanni De Micheli, Srinivasan Murali

Networks on Chip (NoC) has been proposed as a scalable and reusable solution for interconnecting the ever- growing number of processor/memory cores on a single silicon die. As the hardware complexity of a NoC is significant, methods for designing a NoC wit ...

2006