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NoC Topology Synthesis for Supporting Shutdown of Voltage Islands in SoCs

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NoC Topology Synthesis for Supporting Shutdown of Voltage Islands in SoCs

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Method and apparatus for low power chip-to-chip communications with constrained ISI ratio

Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Accelerators for Data Processing

Temperature-Aware Runtime Power Management for Chip-Multiprocessors with 3-D Stacked Cache

Polarity-Controllable Silicon Nanowire Transistors with Dual Threshold Voltages

Near- and Sub-Threshold Design for Ultra-Low-Power Embedded Systems

An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing

Meet the Walkers: Accelerating Index Traversals for In-Memory Databases

Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

Method and apparatus for low power chip-to-chip communications with constrained ISI ratio

Accelerators for Data Processing

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Temperature-Aware Runtime Power Management for Chip-Multiprocessors with 3-D Stacked Cache

Polarity-Controllable Silicon Nanowire Transistors with Dual Threshold Voltages

Near- and Sub-Threshold Design for Ultra-Low-Power Embedded Systems

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Meet the Walkers: Accelerating Index Traversals for In-Memory Databases

An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing