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On the Performance of Software Transactional Memory

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Laws of Order: Expensive Synchronization in Concurrent Algorithms Cannot be Eliminated

Rachid Guerraoui, Hagit Albo Attiya

Building correct and efﬁcient concurrent algorithms is known to be a difﬁcult problem of fundamental importance. To achieve ef- ﬁciency, designers try to remove unnecessary and costly synchro- nization. However, not only is this manual trial-and-error proc ...

2011

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Reconfigurable computing is a promising technology that offers an interesting trade-off between flexibility and performance, which many recent multi-core embedded system applications demand. In order to achieve these objectives, it is necessary to optimize ...

ACM and IEEE Press2011

Laws of order

Rachid Guerraoui, Hagit Albo Attiya

Building correct and efficient concurrent algorithms is known to be a difficult problem of fundamental importance. To achieve efficiency, designers try to remove unnecessary and costly synchronization. However, not only is this manual trial-and-error proce ...

2011

Verification of STM on relaxed memory models

Rachid Guerraoui, Vasu Singh

Software transactional memories (STM) are described in the literature with assumptions of sequentially consistent program execution and atomicity of high level operations like read, write, and abort. However, in a realistic setting, processors use relaxed ...

Springer Verlag2011

Orleans: Cloud Computing for Everyone

James Richard Larus

Cloud computing is a new computing paradigm, combining diverse client devices -- PCs, smartphones, sensors, single-function, and embedded -- with computation and data storage in the cloud. As with every advance in computing, programming is a fundamental ch ...

ACM2011

The VELOX Transactional Memory Stack

Rachid Guerraoui, Vincent Gramoli, Michal Kapalka, Aleksandar Dragojevic, Pascal Felber

The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer’s coordination methodology is cons ...

Institute of Electrical and Electronics Engineers2010

Leveraging Parallel Nesting in Transactional Memory

Rachid Guerraoui, Michal Kapalka, Aleksandar Dragojevic

Exploiting the emerging reality of affordable multi-core architectures goes through providing programmers with simple abstractions that would enable them to easily turn their sequential programs into concurrent ones that expose as much parallelism as possi ...

ACM2010

Theory of Transactional Memory

Michal Kapalka

Transactional memory (TM) is a promising paradigm for concurrent programming, in which threads of an application communicate, and synchronize their actions, via inmemory transactions. Each transaction can perform any number of operations on shared data, an ...

EPFL2010

Transactions in the Jungle

Rachid Guerraoui, Michal Kapalka, Vasu Singh

Transactional memory (TM) has shown potential to simplify the task of writing concurrent programs. Inspired by classical work on databases, formal definitions of the semantics of TM executions have been proposed. Many of these definitions assumed that acce ...

Acm Order Department2010

Exploring Programming Model-driven QoS Support for NoC-based Platforms

Giovanni De Micheli, Luca Benini, Federico Angiolini, Jaime Joven Murillo

Networks-on-Chip (NoCs) are being increasingly considered as a central enabling technology to communication-centric designs as more and more IP blocks are integrated on the same SoC. Embedded applications, in turn, are becoming extremely sophisticated, and ...

2010