Publication

Seeing your error alters my pointing: observing systematic pointing errors induces sensori-motor after-effects

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Analysis of Error Recovery Schemes for Networks on Chips

Giovanni De Micheli, Luca Benini, Srinivasan Murali

In this article, we discuss design constraints to characterize efficient error recovery mechanisms for the NoC design environment. We explore error control mechanisms at the data link and network layers and present the schemes' architectural details. We in ...

Institute of Electrical and Electronics Engineers2005

Locally Testable Codes

Mahdi Cheraghchi Bashi Astaneh

Error correcting codes are combinatorial objects that allow reliable recovery of information in presence of errors by cleverly augmenting the original information with a certain amount of redundancy. The availability of efficient means of error detection i ...

2005

Efficient error correction solutions for OFDM based digital video

Mauro Lattuada

The robustness of the delivery of digital compressed video streams has always been one of the main topic of the standardization bodies to assure the Quality of the Service (QoS). The MPEG standard which is nowadays the reference for digital television defi ...

EPFL2005

Jitter Tolerance Analysis of Clock and Data Recovery Circuits using Matlab and VHDL-AMS

Yusuf Leblebici, Paul Victor Georges Muller

In the scope of the development of a complete top-down design flow targeting clock and data recovery circuits for high-speed data links, we present two methods to analyze the jitter tolerance of such links, based on statistical simulation of incoming data ...

2005

Single and Multi-Hop ARQ in Sensor Networks

Martin Vetterli, Henri Julien Dubois-Ferrière

We present a novel error-correction scheme for sensor networks called Multi-hop Hybrid ARQ (MHARQ). Rather than immediately discard a received corrupt packet, a node buffers it. When two corrupt versions of a packet have been received, a procedure attempts ...

2005

Error Control Schemes for On-chip Communication Links: the energy-reliability trade-off

Giovanni De Micheli, Luca Benini

On-chip interconnection networks for future systems on chip (SoC) will have to deal with the increasing sensitivity of global wires to noise sources such as crosstalk or power supply noise. Hence, transient delay and logic faults are likely to reduce the r ...

Institute of Electrical and Electronics Engineers2005

Effect of Recognition Errors on Information Retrieval Performance

Alessandro Vinciarelli

This work shows experiments on the retrieval of handwritten documents. The performance of the same state-of-the-art Information Retrieval system is compared when dealing with manual (no errors) and automatic (Word Error Rate around 50%) transcriptions of t ...

IDIAP2004

Effect of Recognition Errors on Information Retrieval Performance

Alessandro Vinciarelli

2004

An information theoretic measure of sequence recognition performance

Sequence recognition performance is often summarised first in terms of the number of hits (H), substitutions (S), deletions (D) and insertions (I), and then as a single statistic by the "word error rate" WER = 100(S D I)/(H S D). While in common use, WER h ...

IDIAP2002

Realisation of an Adaptive Audio Tool

Catherine Boutremans, Arnaud Meylan

Real-time audio over the best effort Internet often suffers from packet loss. So far, Forward Error Correction (FEC) seems to be an efficient way to attenuate the impact of loss. Nevertheless to ensure efficiency of FEC, the source rate must be continuousl ...

2000