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Low-power and high-performance Automatic Gain Control systems based on nanoscale Field Effect Diode and SOI-MOSFET

Related publications (33)

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In-IC Strategies for 3D Devices in Bulk Silicon

Matthieu Bopp

The increase of components density in advanced microelectronics is practically dictated by the device size and the achievable pitch between the devices. Scaling down dimensions of devices and progress in the circuit design allowed following Moore's law dur ...

EPFL2011

Tunnel field-effect transistors as energy-efficient electronic switches

Mihai Adrian Ionescu, Heike Riel

Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to inc ...

2011

Nanoengineered Silicon: Technology and Applications

Sandro Carrara, Lucia Baldi Unser

Silicon has been, and continues to be, the material support of integrated circuit (IC) technology-the enabling tool of one of the most impressive technological, industrial and social revolution of mankind. Silicon (both in monocrystalline and polycrystalli ...

2011

Field-Effect Transistors Based on ZnO Nanowires

Daniel Dominik Kälblein

Semiconductor nanowires are an emerging class of materials with great potential for applications in future electronic devices. The small footprint and the large charge-carrier mobilities of nanowires make them potentially useful for applications with high- ...

EPFL2011

Simulation of Double-Gate Silicon Tunnel FETs with a High-k Gate Dielectric

Katherine Boucart

The down-scaling of conventional MOSFETs has led to an impending power crisis, in which static power consumption is becoming too high. In order to improve the energy-efficiency of electronic circuits, small swing switches are interesting candidates to repl ...

EPFL2010

Abrupt switch based on internally combined band-to-band and barrier tunneling mechanisms

Mihai Adrian Ionescu, Luca De Michielis, Livio Lattanzio, Arnab Biswas

We report a simulation-based study of an all-silicon novel device which exploits internally combined quantum mechanical band-to-band and barrier tunneling mechanisms to overcome the intrinsic low current drive limitations of conventional silicon Tunnel FET ...

2010

An area and power optimization technique for CMOS bandgap voltage references

Seyed Armin Tajalli, Mohammad Chahardori

This article explores the main tradeoffs in design of power and area efficient bandgap voltage reference (BGR) circuits. A structural design methodology for optimizing the silicon area and power dissipation of CMOS BGRs will be introduced. For this purpose ...

Springer US2010

New approach for SOI pixel sensor

Louis Harik

Silicon on Insulator (SOI) is an interesting alternative to bulk silicon for the fabrication of integrated circuits due to its advantages with respect to the junction leakage, low switching noise coupling, high temperature immunity, low voltage and low pow ...

EPFL2009

Ultra-thin nanograin polysilicon devices for hybrid CMOS-NANO integrated circuits

Serge Ecoffey

The aim of this research is to develop and to evaluate devices and circuits performances based on ultrathin nanograin polysilicon wire (polySiNW) dedicated to room temperature operated hybrid CMOS-"nano" integrated circuits. The proposed polySiNW device is ...

EPFL2007

Gate-all-around silicon nanowires for hybrid single electron transistor/CMOS applications

Vincent Pott

Scaling of semiconductor devices has pushed CMOS devices close to fundamental limits. The remarkable success story of Moore's law during the last 40 years, predicting the evolution of electronic device performances related to miniaturization, has always be ...

EPFL2007