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The top-down fabrication of a 3D-integrated, fully CMOS-compatible FET biosensor based on vertically stacked SiNWs and FinFETs

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The top-down fabrication of a 3D-integrated, fully CMOS-compatible FET biosensor based on vertically stacked SiNWs and FinFETs

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Alternative Design Methodologies for the Next Generation Logic Switch (invited paper)

Advances, Challenges and Opportunities in 3D CMOS Sequential Integration

CELONCEL: Effective Design Technique for 3-D Monolithic Integration targeting High Performance Integrated Circuits

Top-down fabrication of very-high density vertically stacked silicon nanowire arrays with low temperature budget

Charge-Based Modeling of Junctionless Double-Gate Field-Effect Transistors

Abrupt switch based on internally combined band-to-band and barrier tunneling mechanisms

Compensation mechanism in silicon-doped gallium arsenide nanowires

Design Aspects of Carry Lookahead Adders with Vertically-Stacked Nanowire Transistors

Abrupt switch based on internally combined Band-To-Band and Barrier Tunneling mechanisms

Tunable Electromechanical Resonator Based On Carbon Nanotube Array Suspended Gate Field Effect Transistor (Cnt-Sgfet)