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Design and Implementation of a 46-kS/s CMOS SC Dual-Mode Capacitive Sensor Interface With 50-dB SNR and 0.7% Nonlinearity

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Design and Implementation of a 46-kS/s CMOS SC Dual-Mode Capacitive Sensor Interface With 50-dB SNR and 0.7% Nonlinearity

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Architecture for integrated RF photonic downconversion of electronic signals

A Delta Sigma-Modulated Sample and Average Common-Mode Feedback Technique for Capacitively Coupled Amplifiers in a 192-nW Acoustic Analog Front-End

An Efficient Signal-to-noise Approximation for Eccentric Inspiraling Binaries

Sensitivity, Noise and Resolution in a B -Modified Foundry-Made ISFET with Miniaturized Reference Electrode for Wearable Point-of-Care Applications

An Ultra Low-Noise Micropower PPG Sensor

On the effect of linear feedback and parametric pumping on a resonator's frequency stability

Analysis of photosensor frontends for biomedical applications: a focus on noise

A CMOS Analog Front-End for Implantable Pulmonary Artery Pressure Monitoring System

A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector

A Hybrid CDAC-Threshold Configuring SAR ADC in 28nm FDSOI CMOS