Publication

Analog Programmable Distance Calculation Circuit for Winner Takes All Neural Network Realized in the CMOS Technology

Related publications (129)

About
Privacy
Disclaimer

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

Analog Programmable Distance Calculation Circuit for Winner Takes All Neural Network Realized in the CMOS Technology

Graph Chatbot

Chat with Graph Search

Realization of the Conscience Mechanism in CMOS Implementation of Winner-Takes-All Self-Organizing Neural Networks

An area and power optimization technique for CMOS bandgap voltage references

Low power current-mode binary-tree asynchronous Min/Max circuit

Electrical Modeling of Long-Wavelength VCSELs for Intrinsic Parameters Extraction

Ambipolar silicon nanowire FETs with stenciled sub-µm metal gate

Characterization of Memristive Poly-Si Nanowires via Empirical Physical Modelling

An influence of current-leakage in analog memory on training Kohonen neural network implemented on silicon

Programmable Triangular Neighborhood Functions of Kohonen Self-Organizing Maps Realized in CMOS Technology

Improving the power-delay performance in subthreshold source-coupled logic circuits

Improving the Power-Delay Performance in Subthreshold Source-Coupled Logic Circuits