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Copper TSV-Based Die-Level Via-Last 3D Integration Process with Parylene-C Adhesive Bonding Technique

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Copper TSV-Based Die-Level Via-Last 3D Integration Process with Parylene-C Adhesive Bonding Technique

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Sort vs. Hash Join Revisited for Near-Memory Execution

Cost-Effective Design of Mesh-of-Tree Interconnect for Multi-Core Clusters with 3-D Stacked L2 Scratchpad Memory

Memory Systems and Interconnects for Scale-Out Servers

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Post-CMOS Processing and 3-D Integration Based on Dry-Film Lithography

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