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Design Techniques for Ultra High Frequency Clock Generation in 28 nm FDSOI Technology

Related publications (78)

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Low-Power Design of Digital VLSI Circuits around the Point of First Failure

Andrea Bonetti

As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...

EPFL2019

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Vincent Frédéric Camus

Density, speed and energy efficiency of integrated circuits have been increasing exponentially for the last four decades following Moore's law. However, power and reliability pose several challenges to the future of technology scaling. Approximate computin ...

EPFL2019

Today, the semiconductor industry is feeding our digital world with more and more data coming from compact embedded electronics that are monitoring our environment and feeding analytics for action. Interaction with our digital world is mostly achieved thro ...

EPFL2019

A 6.5-GHz Cryogenic All-Pass Filter Circulator in 40-nm CMOS for Quantum Computing Applications

Edoardo Charbon, Andrea Ruffino, Yatao Peng, Fabio Sebastiano

Cryogenic solid-state quantum processors require classical control and readout electronics; to achieve compactness and scalability, cryogenic integrated circuits have been recently proposed for this goal. Circulators are widely used in readout circuits, ho ...

2019

In this thesis, we explore 3 main topics: non-uniform (in time) sub-sampling, QRS detection in an event-based sub-sampled ECG (electrocardiogram) and implementation on a low-power MCU (Micro Controller Unit). The main idea behind this work is to reduce the ...

2019

Experimental Observation of Topological Fano Resonances for Audible Sound

Romain Christophe Rémy Fleury, Farzad Zangeneh Nejad

The Fano resonance is a widespread wave scattering phenomenon observed in many different systems, from cold atom physics, to electromagnetics, electronic circuits, and acoustics. It is characterized by a very sharp and asymmetric scattering cross-section s ...

2019

An Energy Efficient Power Converter for Zero Power Wearable Devices

Milad Ataei Ashtiani

Early diagnosis of Alzheimer's and epilepsy requires monitoring a subject's development of symptoms through electroencephalography (EEG) signals over long periods. Wearable devices enable convenient monitoring of biosignals, unlike complex and costly hospi ...

EPFL2018

The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...

EPFL2018

8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment

Kyojin Choo

Digital PLLs are popular for on-chip clock generation due to their small size and technology portability. Variability tolerance is a key design challenge when designing such PLLs in an advanced CMOS technology. Environmental variations, such as mismatch, p ...

IEEE2017

Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Andreas Peter Burg, Adam Shmuel Teman, Andrea Bonetti, Nicholas Alexander Preyss

Clocking power, including both clock distribution and registers, has long been one of the primary factors in the total power consumption of many digital systems. One straightforward approach to reduce this power consumption is to apply dual-edge-triggered ...

Association for Computing Machinery2017