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Semiconductor nanowires are an emerging class of materials with great potential for applications in future electronic devices. The small footprint and the large charge-carrier mobilities of nanowires make them potentially useful for applications with high- ...
Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...
Silicon has been, and continues to be, the material support of integrated circuit (IC) technology-the enabling tool of one of the most impressive technological, industrial and social revolution of mankind. Silicon (both in monocrystalline and polycrystalli ...
The progress in the technology of microelectronic devices has led to a strong miniaturization and high performance for circuits and systems, enabling modern applications such as mobile computing and communications. Today, remaining "off-chip" components th ...
A novel approach for the fabrication of transistors and circuits based on individual single-crystalline ZnO nanowires synthesized by a low-temperature hydrothermal method is reported. The gate dielectric of these transistors is a self-assembled monolayer t ...
The aim of this research is to develop and to evaluate devices and circuits performances based on ultrathin nanograin polysilicon wire (polySiNW) dedicated to room temperature operated hybrid CMOS-"nano" integrated circuits. The proposed polySiNW device is ...
Wireless communication systems and handset devices are showing a rapid growth in consumer and military applications. Applications using wireless communication standards such as personal connectivity devices (Bluetooth), mobile systems (GSM, UMTS, WCDMA) an ...
The increase of components density in advanced microelectronics is practically dictated by the device size and the achievable pitch between the devices. Scaling down dimensions of devices and progress in the circuit design allowed following Moore's law dur ...
This paper presents a process for the co-fabrication of self-aligned NMOS and single electron transistors made by gated polysilicon wires. The realization of SET–MOS hybrid architectures is also reported. The proposed process exploits an original low energ ...
Silicon technology has advanced at exponential rates both in performances and productivity through the past four decades. However the limit of CMOS technology seems to be closer and closer and in the future we might see an increasing number of hybrid appro ...