Are you an EPFL student looking for a semester project?
Work with us on data science and visualisation projects, and deploy your project as an app on top of Graph Search.
A low-power 14-bits first order incremental Analog-to-Digital Converter (ADC) is presented. Based on the charge balancing principle, this switched-capacitor (SC) circuit integrates the input signal multiple times to reach the targeted resolution, linearity and noise performances. The sensitivities to non-ideal effects usually plaguing analog CMOS SC circuits, such as amplifier finite open-loop gain, offset, noise, parasitic capacitances and charge-injection of the switches are discussed. Their impact on the conversion accuracy and speed are evaluated, and corresponding design constraints are deduced. The ADC is implemented in an Application Specific Integrated Circuit (ASIC) in an AMS0.35 mu m process and is aimed for a high accuracy capacitance sensing to monitor the insulin injection in pens for diabetics. A minimum resolution of 0.3 fF, proportional to a third of an injectable insulin unit is targeted. The ADC is made low-power, allowing thus to perform many measurements per day considering its implementation in a lithium battery powered injection pen system of six months' life cycle.
Maher Kayal, Evgenia Voulgari, François Krummenacher
Sandro Carrara, Diego Ghezzi, Gian Luca Barbruni