Toward ultra-low power design methodology for frequency generation in the IoT design space
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Hardware security concerns such as IP piracy and hardware Trojans have triggered research into circuit protection and malicious logic detection from various design perspectives. In this paper, emerging technologies are investigated by leveraging their uniq ...
Transistors are the fundamental elements in Integrated Circuits (IC). The development of transistors significantly improves the circuit performance. Numerous technology innovations have been adopted to maintain the continuous scaling down of transistors. W ...
The evolution of computing has lead to very different realizations to cope with performance and energy consumption density, two competing factors that are not obvious to reconcile. The current semiconductor technologies, mainly FinFETs and FDSoI, provide u ...
Twentieth century has been the golden age of semiconductor industry by achieving a high level of growth as a courtesy of developments in fabrication techniques and downscaling of the technology. Since the downscaling in current lithography technology is re ...
Substantial downscaling of the feature size in current CMOS technology has confronted digital designers with serious challenges including short channel effect and high amount of leakage power. To address these problems, emerging nano-devices, e.g., Silicon ...
Internet of Things (IoT), which is one of the main talking points in the electronics industry today, consists of a number of highly miniaturized sensors and actuators which sense the physical environment around us and communicate that information to a cent ...
Three-dimensional (3-D) or vertical integration is a design and packaging paradigm that can mitigate many of the increasing challenges related to the design of modern integrated systems. 3-D circuits have recently been at the spotlight, since these circuit ...
A low-power 4-channel hybrid NRZ/multi-tone transceiver for multi-drop bus (MDB) memory interfaces is designed and fabricated in 40 nm CMOS technology. The proposed system achieves 1 pJ/bit power efficiency, while communicating over an MDB channel with 45 ...
Today circuit failures in Smart Power ICs due to substrate couplings are partially addressed during the circuit design phase. The state-of-the-art guidelines for the optimization of parasitic couplings provide mainly qualitative rules, which are difficult ...
Institute of Electrical and Electronics Engineers2016
Electronics today permeate our life and existence. It has become nearly impossible to evade any dependence on electronic devices that surround us every day - computers, phones, televisions. But also other objects become increasingly "smart" - watches, cars ...