A Dynamically Reconfigurable Platform for High-Performance and Low-Power On-Board Processing
Related publications (78)
Graph Chatbot
Chat with Graph Search
Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.
DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.
The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...
EPFL2018
, ,
FPGAs offer high performance coupled with energy efficiency making them extremely attractive computational resources within a cloud ecosystem. However, to achieve this integration and make them easy to program, we first need to enable users with varying ex ...
2017
, ,
Traditional data management systems map information using centralized and static data structures. Modern applications need to process in real time datasets much larger than system memory. To achieve this, they use dynamic entities that are updated with str ...
2019
Field Programmable Gate Arrays (FPGAs) have been indispensable components of embedded systems and datacenter infrastructures. However, energy efficiency of FPGAs has become a hard barrier preventing their expansion to more application contexts, due to two ...
EPFL2017
,
This paper demonstrates the feasibility of implementing real-time state estimators for active distribution networks in field-programmable gate arrays (FPGAs) by presenting an operational prototype. The prototype is based on a linear state estimator that us ...
Institute of Electrical and Electronics Engineers2017
, ,
Circuits naturally exhibit recurring patterns of local interconnect. Hardening those patterns when designing Field Programmable Gate Array (FPGA) clusters can both eliminate slow programmable connections from the critical path and remove the need for trans ...
IEEE2019
As transistor scaling is slowing down [1], other opportunities for ensuring continuous performance increase have to be explored. Field programmable gate arrays (FPGAs) are in the spotlight these days: not only due to their malleability and energy efficienc ...
2017
, , ,
The live demonstration presents the innovative concept of a portable pen-device able to sense anaesthetic compounds over time for improved anaesthesiology practice. A custom Printed Circuit Board (PCB) manage in the event-based quasi-digital domain the sam ...
IEEE2019
,
The application of Phasor Measurement Units (PMUs) to the real-time monitoring, protection and control of Distribution Networks, requires the availability of high accuracy devices that are characterized at the same time by a reasonable cost. This paper pre ...
Field-programmable gate arrays (FPGAs) are, like CPUs, susceptible to side-channel information leakage and covert communication. The malleability of FPGAs enables users to create and control physical effects, and sense and measure the consequences. With FP ...
