Impact of Strain and Alloy Disorder on the Electronic Properties of III-Nitride Based Two-dimensional Electron Gases

Over the past 20 years, III-nitrides (GaN, AlN, InN and their alloys) have proven to be an excellent material group for electronic devices, in particular, for high electron mobility transistors (HEMTs) operating at high frequency and high power. This is mainly thanks to the wide band gap of III-nitrides and the spontaneous polarization along the technologically relevant (0001) direction. Heteroepitaxy of III-nitride heterostructures enables the formation of two-dimensional electron gases (2DEGs) with high carrier densities (> 10^13 cm^-2) and high electron mobilities (2000 cm^2V^-1s^-1). The heterostructures usually consist of AlGaN, InAlN or AlN barriers grown epitaxially on GaN buffers. Devices based on these structures exhibit excellent performance and have reached technological maturity, enabling notably the commercialization of AlGaN/GaN HEMTs. Despite the success of III-nitride HEMTs thus far, the full potential of the material group for electronics has not yet been unleashed. The aim of this thesis is to investigate two novel heterostructure designs and to determine the physical mechanisms limiting their electronic properties. This was done by epitaxial growth followed by characterization of material and electronic properties. The first studied heterostructure was AlN/GaN/AlN where the GaN channel is fully strained to AlN. In order to achieve pseudomorphic growth of GaN on AlN, the onset of strain relaxation, i.e., the critical thickness, is of paramount importance. Furthermore, the impact of growth parameters such as temperature and initial dislocation density need to be considered. Over the past years several, research groups have reported on the electronic properties of ultra-thin GaN channels on AlN. Interestingly, all reported 2DEGs suffer from a low electron mobility with values usually below 600 cm^2V^-1s^-1. In this thesis, the strain relaxation and critical thickness of GaN on AlN were determined. Furthermore, the origin of low electron mobility for AlN/GaN/AlN heterostructures and in general thin-GaN channels grown on AlN were systematically studied. The second heterostructure that was investigated during this thesis was based on InGaN channels. In this case, the 2DEG is formed in an In-rich InGaN layer. The low electron effective mass of InN (0.05 m0) compared to GaN (0.2 m0) should theoretically give rise to a higher electron mobility. However, for In-rich channels alloy disorder scattering is particularity strong in III-nitrides. This has been shown both by optical measurements and theoretical calculations based on the localization landscape theory. Surprisingly, high electron mobilities have been reported in literature for high In content InGaN channels. In these cases, the electron mobility appears not to be limited by alloy disorder scattering. During this thesis, the electron mobility of InGaN channels was determined as a function of In content. Furthermore, the unintentional growth of GaN interlayers is proposed as the possible origin for the reported high electron mobilities in literature.

Leakage mechanisms and contact technologies in InAlN/GaN high electron mobility transistors

Lorenzo Lugani

GaN based electronic devices have progressed rapidly over the past decades and are nowadays starting to replace Si and classical III-V semiconductors in power electronics systems and high power RF amplifiers. AlGaN/GaN heterostructures have been, until recently, the materials system of choice for nitride based electronics. The limits of AlGaN/GaN technologies are now known and alternative routes able to overcome them are actively investigated. Nearly lattice-matched InAlN/GaN heterostructures have emerged as viable solutions for extending the frequency range achievable by GaN based devices. These heterostructures have also proven a very high thermal stability, becoming of high interest for extreme environment applications. However, despite those great potentials, InAlN/GaN based devices, in particular high electron mobility transistors, have suffered from high leakage currents, strong short channel effects and low breakdown voltage that made them not competitive with respect to AlGaN/GaN technologies. The goal of this thesis is to investigate, understand and control the mechanisms that limit the performance of InAlN/GaN based transistors. Particular attention in this thesis will be given to leakage currents, having gate or buffer origin. Concerning gate leakage currents, an accurate model for InAlN/GaN heterostructures will be established and the expected presence of deep levels will be confirmed by means of photocapacitance spectroscopy. Based on these results, it will be shown that two conduction mechanisms contribute to gate leakage currents. A first mechanism dominates in heterostructures with thin (

EPFL2015

Physical Properties of Al1-xInxN/(AIN)/GaN (0.07

Marcus Gonschorek

AlInN is a material which is known to be difficult to be grown among the III-nitride ternary compounds. It attracted much attention only recently and starts to be studied intensively mainly for electronic applications. The aim of this work is manifold. Various structural, electrical and optical measurements are brought together to underline the outstanding quality of AlInN epi-layers grown by metalorganic vapor phase epitaxy (MOVPE). Especially the electrons confined at the heterointerface of coherently grown AlInN on GaN buffer layers determine crucially the electronic properties. An appropriate model based on charge balance is proposed allowing the extraction of all significant electrical properties. An AlN interlayer has been introduced at the AlInN/GaN interface and was found to tremendously affect transport properties. This issue is studied intensively and results indicate that even slightest deviations from atomically perfect interfaces leads to the creation of huge piezoelectric fields disturbing carrier transport in the case of strongly mismatched epilayers. A similar debate was conducted concerning the localization of carriers in InGaN quantum wells. High electron mobility transistors (HEMT) processed from these heterostructures exhibits excellent device performance exceeding 2 A/mm even on sapphire substrates. This are the highest currents ever reported for nitride heterostructures. The same structures grown on Si(111) substrates allow reaching cut-off frequency in excess of 100 GHz . However, results are puzzling and on at first sight striking since the device saturation currents of structures grown on SiC are similar to results on sapphire despite its much larger thermal diffusivity. Therefore we studied the temperature arising in the device under applied voltages using a micro-photoluminescence (µPL) setup. To our knowledge this is the first study of this type. The main advantage is the use of the short wavelength for excitation in comparison with well-established Raman methods. However we find from this analysis a significant heat development up to 1200 K for devices with 5 µm drain-source distance. The heating can be understood in terms of excited optical phonons due to field accelerated electrons under applied voltages. The comparison of the available amount of phonons in the finite volume covered by the 2D electrons and the number of created phonons in the acceleration process allows formulating a simple relation for the saturation currents as a function of the transport properties. However, this mechanism also explains why the saturation currents are far below expected values from simple velocity saturated currents models and independent of the substrate. However, heat, i.e. the decomposition of local optical phonons into acoustical phonons with large group velocity, is dissipated differently depending on substrate influencing therefore mainly the reliability of the devices. Beside the electrical breakdown due to avalanche carriers a second thermally induced breakdown mechanisms is proposed. Finally, the capability of those heterostructures for sensing is discussed. Especially the electrically response on external stimulus such as UV radiation and the exposition of the surface to polar liquids is investigated.

EPFL2011

Ordered nanostructures on silicon substrates

Jelena Vukajlovic Plestina

Silicon is today the main material used in electronics. It is a very advanced and mature technology. It is therefore clear that new technological concepts and materials should be introduced through the integration on the silicon platform. III-V semiconductors, such as GaAs and InAs, are high performance semiconductors, with direct bandgap and high carrier mobility, what makes them very prominent candidates for future electronics and optoelectronics. Lattice, thermal and polarity mismatch have been for decades limiting their integration on Si in the form of thin film technology. The nanowire geometry brings new prospects in this direction by reducing the contact area between mismatched materials,. Now, while growth of defect-free III-V structures on silicon is important, use in applications requires the nanostructures to be placed deterministically following a certain design/order. In this thesis we have studied different mechanisms to obtain ordered nanostructures on a silicon substrate, with the goal of increasing its functionality. The core part of this work was dedicated to the integration of III-V nanowires on Si in the formof ordered arrays. We have considered both GaAs and InAs nanowires. This process has several requirements: substrate fabrication and the growth process should be CMOS compatible, nanowires within the arrays should be grown vertically with a yield close to 100% and nanowires should be clones-looking and performing the same. An additional point to consider is that the fabrication process should be compatible with large scale techniques. The substrate requirements for obtaining ordered arrays of Ga-assisted GaAs nanowires on silicon were identified. In particular, we focused on the initial stages of growth, that turned to be key for achieving a high yield in the arrays. We found that the positioning of the Ga droplet within the predefined holes on the substrate determined whether the nanowire would grow perpendicularly to the substrate. Our HRTEMstudies on the titled nanowires show that the initial nanowire seeds seem to nucleate at the corner of the nanoscale holes. Instead, the crystal seeds of vertical nanowires occupy homogeneously the nanoscale holes. Achieving high yield in the growth of GaAs arrays on silicon also allowed us to study their evolution in time. We demonstrated that there is an incubation time for nanowires to start growing. This incubation time is different from NW to NWand leads to a relatively broad length distribution. We proposed a solution and showed how an increase in the supersaturation in the Ga droplet leads to the formation of homogeneous arrays. Growth of InAs nanowires in ordered arrays on silicon was based on the concept of guided growth. We used a SiO2 nanotube templates to promote vertical growth. Due to the directionality of MBE, achieving growth inside a nanotube was especially challenging. Our results provided new insights on the role of different pathways of the In and As4 adatoms during growth. In this part, large scale patterning by phase shift photolithography was demonstrated as an alternative to the conventionally used electron beam lithography. Stain etching method for producing porous silicon was applied on top-bottom fabricated Si micropillars. This led to geometrically driven electrochemical dissolution of silicon trough the center of the microstructure forming microtubes. The optical properties were also studied and used to produce functional 3D LED.