Steep Slope Transistors for Quantum Computing

In this paper we will present and discuss the potential of steep slope transistors to serve at cryogenic temperature: (i) the electronic design that is needed for qubit error correction and/or interfacing and (ii) to serve as ultra-sensitive charge detectors and potentially replace single electron transistors and/or CMOS for certain electronic functions. We suggest that among the various categories of steep slope devices, the heterojunction tunnel FETs compatible with CMOS platforms form a class of device candidates capable to play an important role in the future quantum computing (QC) down to cryogenic temperatures. The paper will investigate and discuss the potential merits of these devices.