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WSe2/SnSe2 vdW heterojunction Tunnel FET with subthermionic characteristic and MOSFET co-integrated on same WSe2 flake

Related publications (51)

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FinFET integrated low-power circuits for enhanced sensing applications

Mihai Adrian Ionescu, Antonios Bazigos, Alexandru Rusu, Sara Rigante, Paolo Livi

This work presents different circuit architectures that combine sensing and signal readout functions. The basic building block is a Fin Field-Effect Transistor (Fin-FET) used as both sensor and metal gate transistor. Moreover, a hybrid partially gated FinF ...

Elsevier2013

Single-layer MoS₂

Branimir Radisavljevic

This thesis explores the electronic properties of one layered transition-metal dichalcogenide – single-layer MoS2, and demonstrates the first transistors and integrated circuits with characteristics that outperform graphene electronics in many aspects and ...

EPFL2013

Comparison between front- and back-gating of Silicon Nanoribbons in real-time sensing experiments

Carlotta Guiducci, Enrico Accastelli, Giulia Cappi, Thomas Ernst

Field-effect transistors (FETs) with open gate structures such as Silicon Nanoribbons (SiNRs) are promising candidates to become general platforms for ultrasensitive, label-free and real-time detection of biochemical interactions on surface. This work prop ...

2013

Tunneling and Occupancy Probabilities: How Do They Affect Tunnel-FET Behavior?

Mihai Adrian Ionescu, Kirsten Emilie Moselund, Luca De Michielis, Livio Lattanzio, Heike Riel

In this letter, the occupancy and tunneling probabilities of interband tunneling devices are studied, pointing out the fundamental function of the source Fermi-Dirac distribution. Particularly, the reason for the degraded subthreshold swing, which is typic ...

Ieee-Inst Electrical Electronics Engineers Inc2013

Downscaling and Short Channel Effects in Twin Gate Junctionless Vertical Slit FETs

Jean-Michel Sallese, Didier Bouvet, Farzan Jazaeri, Lucian Barbut

we present the performance constraints in the design of ultra-thin body Junctionless Vertical Slit Field Effect Transistor (JL VeSFET). A design space that take into account the intrinsic off-current, the sub-threshold swing and the drain induced barrier l ...

2013

Beyond Scaling

Luca De Michielis

Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...

EPFL2012

From All-Si Nanowire TFETs Towards III-V TFETs

Hesham Ghoneim

Performance improvement by device scaling has been the prevailing method in the semiconductor industry over the past four decades. However, current silicon transistor technology is approaching a fundamental limit where scaling does not improve device perfo ...

EPFL2012

Multi-gate Si nanowire MOSFETs

Mohammad Najmzadeh

Multi-gate devices e.g. gate-all-around (GAA) Si nanowires and FinFETs are promising can- didates for aggressive CMOS downscaling. Optimum subthreshold slope, immunity against short channel effect and optimized power consumption are the major benefits of s ...

EPFL2012

Process Variation and Leakage Power

Bahman Kheradmand Boroujeni

Technology scaling improves the energy, performance, and area of the digital circuits. With further scaling into sub-45nm regime, we are moving toward very low supply (VDD) and threshold voltages (VT), smaller VDD/VT ratio, high leakage current, and large ...

EPFL2011

Field-Effect Transistors Based on ZnO Nanowires

Daniel Dominik Kälblein

Semiconductor nanowires are an emerging class of materials with great potential for applications in future electronic devices. The small footprint and the large charge-carrier mobilities of nanowires make them potentially useful for applications with high- ...

EPFL2011