Publication

Logic-in-memory based on an atomically thin semiconductor

Related publications (94)

About
Privacy
Disclaimer

Graph Chatbot

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

Logic-in-memory based on an atomically thin semiconductor

Graph Chatbot

Chat with Graph Search

Vertically-stacked gate-all-around polysilicon nanowire FETs with sub-μm gates patterned by nanostencil lithography

Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs

Physical Synthesis onto Sea-of-Tiles with Double-Gate Silicon Nanowire Transistors

Self-Assembled Nano-Electro-Mechanical Tri-state Carbon Nanotube Switches for Reconfigurable Integrated Circuits

Integrated Circuits and Logic Operations Based on Single-Layer MoS2

Organic Thin-Film Transistors and Circuits Fabricated by Stencil Lithography on Full-Wafer Flexible Substrates

An Efficient Gate Library for Ambipolar CNTFET Logic

Silicon Nanowire Arrays and Crossbars: Top-Down Fabrication Techniques and Circuit Applications

Reducing the Pressure on Routing Resources of FPGAs with Generic Logic Chains

Memristive Devices Fabricated with Silicon Nanowire Schottky Barrier Transistors