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Cryogenic MOSFET Modeling for Large-Scale Quantum Computing

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Accurate RF modeling of nanoscale MOSFET using BSIM6 including low levels of inversion

Christian Enz, Maria-Anna Chalkiadaki

Nanoscale CMOS devices display very high peak transit frequency Ft of several hundreds of GHz. This feature can be exploited for reducing power consumption by shifting the operating point towards moderate or eventually weak inversion where the Ft still rea ...

Elsevier2014

Design Methodologies and CAD for Emerging Nanotechnologies

Shashi Kanth Bobba

With technology scaling reaching the fundamental limits of Si-CMOS in the near future, the semiconductor industry is in quest for innovation from various disciplines of integrated circuit (IC) design. At a fundamental level, technology forms the main drive ...

EPFL2013

Single-layer MoS₂

Branimir Radisavljevic

This thesis explores the electronic properties of one layered transition-metal dichalcogenide – single-layer MoS2, and demonstrates the first transistors and integrated circuits with characteristics that outperform graphene electronics in many aspects and ...

EPFL2013

Temperature considerations on Hall Effect sensors current-related sensitivity behaviour

Maher Kayal, Jean-Michel Sallese, Maria-Alexandra Paun

The present paper focuses on evaluating the temperature effects on Hall Effect sensors sensitivity behavior. To this purpose, an analysis of the factors affecting the sensors current-related sensitivity is performed, consisting of several pertinent conside ...

Springer US2013

Ultrathin Body InAlN/GaN HEMTs for High-Temperature (600 degrees C) Electronics

Nicolas Grandjean, Jean-François Carlin, Lorenzo Lugani

Lattice matched 0.25-mu m gatelength InAlN/GaN high electron mobility transistors are realized in an ultrathin body mesa technology (50-nm AlN nucleation layer/50-nm GaN buffer) on sapphire. At room temperature, the maximum output current density is I-DS = ...

Ieee-Inst Electrical Electronics Engineers Inc2013

Low-power RF modeling of a 40nm CMOS technology using BSIM6

Christian Enz, Maria-Anna Chalkiadaki

The state-of-the-art scaled down CMOS processes have led to devices with extremely high Ft reaching several hundreds of GHz. This high F t can be traded with power consumption by moving the operating point towards weak inversion with Ft reaching tens of GH ...

2013

Substrate Current Modeling for high Temperature Smart Power BCD Technology

Fabrizio Lo Conte

The electronics industry is present nowadays in the most various applications. A new type of technology for integrated circuits named BCD has started to be developed and appeared from the mid 1980’s. This new technology allows integrating bipolar transisto ...

EPFL2012

Beyond Scaling

Luca De Michielis

Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...

EPFL2012

RF Compact Modeling of High-voltage MOSFETs

Jean-Michel Sallese, François Krummenacher, Antonios Bazigos, Matthias Bucher

The High-Voltage MOSFET is used in a wide variety of applications covering from power systems up to RF-IC. Compact models that describe the high-frequency behavior of the device are required to predict high-frequency operation and switching capabilities of ...

Medknow Publications2012

Process Variation and Leakage Power

Bahman Kheradmand Boroujeni

Technology scaling improves the energy, performance, and area of the digital circuits. With further scaling into sub-45nm regime, we are moving toward very low supply (VDD) and threshold voltages (VT), smaller VDD/VT ratio, high leakage current, and large ...

EPFL2011