Optimisation of a new strain sensor based on the piezo-tunneling effect
Related publications (32)
Graph Chatbot
Chat with Graph Search
Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.
DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.
The aim of this thesis is to characterize the properties of a Josephson junction in a Scanning Tunneling Microscope (STM) at millikelvin temperatures and to implement Josephson STM (JSTM) as a versatile probe at the atomic scale. To this end we investigate ...
A Ferroelectric tunnel FET switch as ultra-steep (abrupt) switch with subthreshold swing better than the MOSFET limit of 60 mV/decade at room temperature combining two key principles: ferroelectric gate stack and band-to-band tunneling in gated p-i-n junct ...
A large area array of metal-oxide-metal (MOM) tunneling diodes with an ultrathin dielectric (∼3.6 nm aluminum oxide) have been fabricated via a transfer-printing process. The MOM diodes exhibit an excellent tunneling behavior that is suitable for rectifyin ...
Tunnel FETs are the most promising ultra low power devices due to their potential of steeper subthreshold slopes and capability of using very low drive voltages. Switching is based on quantum mechanical band to band tunneling and no longer on thermal emiss ...
Classical substrate noise analysis considers the silicon resistivity of an integrated circuit only as doping dependent besides neglecting diffusion currents as well. In power circuits minority carriers are injected into the substrate and propagate by drift ...
This paper presents a new modeling methodology accounting for generation and propagation of minority carriers that can be used directly in circuit-level simulators in order to estimate coupled parasitic currents. The method is based on a new compact model ...
Institute of Electrical and Electronics Engineers2010
The semiconductor industry, governed by the Moore's law, has achieved the almost unbelievable feat of exponentially increasing performance while lowering the costs for years. The main enabler for this achievement has been the scaling of the CMOS transistor ...
The increase of components density in advanced microelectronics is practically dictated by the device size and the achievable pitch between the devices. Scaling down dimensions of devices and progress in the circuit design allowed following Moore's law dur ...
In this paper, we report on the integration technique and fabrication of a scanning probe interrogating the location of charges and their tracks inside quantum devices. Our unique approach is to pattern the charged sensor into a high topography micromechan ...
In this work we present uni-directional GaN-on-Si MOSHEMTs with state-of-the-art reverse-blocking performance. We integrated tri-anode Schottky barrier diodes (SBDs) with slanted tri-gate field plates (FPs) as the drain electrode, and achieved a high rever ...