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OpenMP on Networks of SMPs

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TM2C: A software transactional memory for many-cores

Rachid Guerraoui, Vincent Gramoli, Vasileios Trigonakis

Transactional memory is an appealing paradigm for concurrent programming. Many software implementations of the paradigm were proposed in the last decades for both shared memory multi-core systems and clusters of distributed machines. However, chip manufact ...

2012

The Complexity Of Early Deciding Set Agreement

Rachid Guerraoui, Bastian Pochon

In the k-set agreement problem, each processor starts with a private input value and eventually decides on an output value. At most k distinct output values may be chosen, and every processor's output value must be one of the proposed values. We consider a ...

Society for Industrial and Applied Mathematics2011

Chip-Level Redundancy in Distributed Shared-Memory Multiprocessors

Babak Falsafi

Distributed shared-memory (DSM) multi- processors provide a scalable hardware platform, but lack the necessary redundancy for mainframe-level reliability and availability. Chip-level redundancy in a DSM server faces a key challenge: the increased latency t ...

2009

Stretching Transactional Memory

Rachid Guerraoui, Michal Kapalka, Aleksandar Dragojevic

Transactional memory (TM) is an appealing abstraction for programming multi-core systems. Potential target applications for TM, such as business software and video games, are likely to involve complex data structures and large transactions, requiring speci ...

2009

Stretching Transactional Memory

Rachid Guerraoui, Michal Kapalka, Aleksandar Dragojevic

2008

Scheduling threads for constructive cache sharing on CMPs

Anastasia Ailamaki, Babak Falsafi

In chip multiprocessors (CMPs), limiting the number of offchip cache misses is crucial for good performance. Many multithreaded programs provide opportunities for constructive cache sharing, in which concurrently scheduled threads share a largely overlappi ...

2007

The Granularity of Soft-Error Containment in Shared-Memory Multiprocessors

Babak Falsafi

Concerns over rising soft-error rates in processor logic has led to numerous proposals for error tolerance mechanisms. In this paper, we examine the role of soft-error containment in a shared memory multiprocessor. We study a range of design alternatives b ...

2006

Can a Helmholtz solver run on a cluster?

Marc Anthony David Habisreutinger, Emmanuel Leriche, Vincent Keller

Our vectorized Helmholtz solver runs at 85% efficiency on a NEC SX-5. The most time-consuming parts have been ported on SMP, NUMA, and cluster architectures. It is shown that an OpenMP version can deliver similar performance when running it on a 16 process ...

IEEE2006

Shared Memory vs Message Passing

Rachid Guerraoui

his paper determines the computational strenght of the shared memory abstraction (a register) emulated over a message passing system, and compares it with fundamental message passing abstractions like consensus and various forms of reliable broadcast. We i ...

2003

Multiplex: Unifying conventional and speculative thread-level parallelism on a chip multiprocessor

Babak Falsafi

Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., implicit threads) from the sequential execution stream and speculatively execute ...

2001