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Synthesis of program fragments from specifications can make programs easier to write and easier to reason about. To integrate synthesis into programming languages, synthesis algorithms should behave in a predictable way---they should succeed for a well-def ...
Programming languages are not only useful to command computers, they also increasingly are a medium for human communication. I will use the framework of distributed cognition to discuss how knowledge is shared in a team of programmers and to show that comp ...
We revisit the problem of scaling software routers, motivated by recent advances in server technology that enable high-speed parallel processing---a feature router workloads appear ideally suited to exploit. We propose a software router architecture that p ...
Since the bandwidth-delay products of Internet links keep increasing, issues with TCP's convergence time, throughput, and amount of queuing in these environments are becoming more pressing. As we move toward the next-generation Internet, it is important to ...
We introduce a novel multi-resource allocator to dynamically allocate resources for database servers running on virtual storage. Multi-resource allocation involves proportioning the database and storage server caches, and the storage bandwidth between appl ...
We examine the problem of message recognition by reviewing the definitions and the security model in the literature. In particular, we examine the Jane Doe protocol, which was proposed by Lucks et al., more closely and note its inability to recover in case ...
There is an impedance mismatch between message-passing concurrency and virtual machines, such as the JVM. VMs usually map their threads to heavyweight OS processes. Without a lightweight process abstraction, users are often forced to write parts of concurr ...
The performance of the networking stack in an operating system depends on the overhead incurred by two of its components: the per-byte overhead incurred in data-touching operations, and the per-packet overhead of protocol processing and other operating sys ...
Distributed shared-memory (DSM) multi- processors provide a scalable hardware platform, but lack the necessary redundancy for mainframe-level reliability and availability. Chip-level redundancy in a DSM server faces a key challenge: the increased latency t ...
L1 instruction-cache misses pose a critical performance bottleneck in commercial server workloads. Cache access latency constraints preclude L1 instruction caches large enough to capture the application, library, and OS instruction working sets of these wo ...