Concept

Synthèse logique

Publications associées (273)

Majority-based Synthesis for Nanotechnologies

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

We study the logic synthesis of emerging nanotechnologies whose elementary devices abstraction is a majority voter. We argue that synthesis tools, natively supporting the majority logic abstraction, are the technology enablers. This is because they allow d ...

Ieee2016

LUT Mapping and Optimization for Majority-Inverter Graphs

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Winston Jason Haaswijk

A Majority-Inverter Graph (MIG) is a directed acyclic graph in which every vertex represents a three-input majority operation and edges may be complemented to indicate operand inversion. MIGs have algebraic and Boolean properties that enable efficie ...

2016

SyReC: A hardware description language for the specification and synthesis of reversible circuits

Mathias Soeken

Although researchers and engineers originally focused on a preponderantly irreversible computing paradigm, alternative models receive more and more attention. Reversible computation is a promising example which has applications in many emerging technologie ...

2016

Automatic Generation of Efficient Accelerators for Reconfigurable Hardware

Christos Kozyrakis, Yunqi Zhang

Acceleration in the form of customized datapaths offer large performance and energy improvements over general purpose processors. Reconfigurable fabrics such as FPGAs are gaining popularity for use in implementing application-specific accelerators, thereby ...

Ieee2016

SAT-Based Combinational and Sequential Dependency Computation

Giovanni De Micheli, Mathias Soeken

We present an algorithm for computing both functional dependency and unateness of combinational and sequential Boolean func- tions represented as logic networks. The algorithm uses SAT-based tech- niques from Combinational Equivalence Checking (CEC) ...

Springer2016

Imprecise Security: Quality and Complexity Tradeoffs for Hardware Information Flow Tracking

Paolo Ienne, Andrew James Becker, Ryan Charles Kastner, Wei Hu

Secure hardware design is a challenging task that goes far beyond ensuring functional correctness. Important design properties such as non-interference cannot be verified on functional circuit models due to the lack of essential information (e.g., sensitiv ...

Assoc Computing Machinery2016

Synthesis of Dual Mode Logic

Adam Shmuel Teman

In recent years, the major focus of VLSI design has shifted from high-speed to low-power consumption. While standard CMOS-based digital design provides substantial flexibility during pre-silicon design phases, the characteristics of the gates are set by fa ...

Elsevier2016

Pattern-based fpga logic block and clustering algorithm

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang

A routing architecture for fast interconnections between Look-Up Tables (LUTs) in a group of Basic Logic Elements (BLEs), whereby a size of the group ranges from 1 to k+1, where k is the number of inputs of a LUT, and LUTs in the group are indexed from 1 t ...

2016

High-level system synthesis and optimization of dataflow programs for MPSoCs

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

The growing complexity of digital signal processing applications make a compelling case the use of high-level design and synthesis methodologies for the implementation on reconfigurable and embedded devices. Past research has shown that raising the level o ...

2016

Notes on Majority Boolean Algebra

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Anupam Chattopadhyay

A Majority-Inverter Graph (MIG) is a homogeneous logic network, where each node represents the majority function. Recently, a logic optimization package based on the MIG data-structure, with 3-input majority node (M3) has been proposed [2], [30]. It is dem ...

IEEE2016

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