Espresso heuristic logic minimizer

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RM3 based logic synthesis

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon

In-memory computing devices, such as resistive RAMs, natively implement material implication or a variant of the majority-of-three operation called RM3. This operation generalizes material implication and has been used as target operation in sev ...

IEEE2017

A Novel Basis for Logic Rewriting

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Winston Jason Haaswijk

Given a set of logic primitives and a Boolean function, exact synthesis finds the optimum representation (e.g., depth or size) of the function in terms of the primitives. Due to its high computational complexity, the use of exact synthesis is limite ...

Ieee2017

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Giovanni De Micheli, Paolo Ienne, Mathias Soeken, Grace Zgheib, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Ana Petkovska, Luca Gaetano Amarù, Zhufei Chu

Hard-wired carry chains in FPGAs are designed to improve efficiency of important arithmetic primitives. Although they are proven to be effective for arithmetic-rich functions, there are very few studies on the optimization opportunities of carry chains for ...

ACM2017

Leading the Blind : Automated Transistor-Level Modeling for FPGA Architects

Grace Zgheib

The design and development of innovative FPGA architectures hinge on the flexibility of its toolchain. Retargetable toolchains, like the Verilog-to-Routing (VTR) flow, have been developed to enable the testing of new FPGAs by mapping circuits onto easily-d ...

EPFL2017

Classifying Functions with Exact Synthesis

Giovanni De Micheli, Mathias Soeken, Eleonora Testa, Winston Jason Haaswijk

Due to recent advances, constraint solvers have become efficient tools for synthesizing optimum Boolean circuits. We take advantage of this by showing how SAT based exact synthesis may be used as a method for finding minimum length Boolean chains. As oppos ...

IEEE2017

Exact Synthesis for Logic Synthesis Applications with Complex Constraints

Giovanni De Micheli, Mathias Soeken, Eleonora Testa, Odysseas Zografos

Exact synthesis is the problem of finding logic networks that represent given Boolean functions and respect given constraints. With exact synthesis it is possible to find optimum networks, e.g., in size or depth; consequently, it primarily finds applicatio ...

2017

Notes on Majority Boolean Algebra

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Anupam Chattopadhyay

A Majority-Inverter Graph (MIG) is a homogeneous logic network, where each node represents the majority function. Recently, a logic optimization package based on the MIG data-structure, with 3-input majority node (M3) has been proposed [2], [30]. It is dem ...

IEEE2016

Majority-based Synthesis for Nanotechnologies

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

We study the logic synthesis of emerging nanotechnologies whose elementary devices abstraction is a majority voter. We argue that synthesis tools, natively supporting the majority logic abstraction, are the technology enablers. This is because they allow d ...

Ieee2016

Optimizing Majority-Inverter Graphs with Functional Hashing

Giovanni De Micheli, Mathias Soeken, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

A Majority-Inverter Graph (MIG) is a recently introduced logic representation form whose algebraic and Boolean properties allow for efficient logic optimization. In particular, when considering logic depth reduction, MIG algorithms obtained signific ...

IEEE2016

The Programmable Logic-in-Memory (PLiM) Computer (Invited)

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Anupam Chattopadhyay

Realization of logic and storage operations in memristive circuits have opened up a promising research direction of in-memory computing. Elementary digital circuits, e.g., Boolean arithmetic circuits, can be economically realized within memristive circuits ...

Ieee2016

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