Eleonora Testa

Adiabatic quantum-flux-parametron (AQFP) circuits are a family of superconducting electronic (SCE) circuits that have recently gained growing interest due to their low-energy consumption, and may serve as alternative technology to overcome the down-scaling limitations of CMOS. The AQFP circuits logic design differs from classic digital design in many respects. For this reason, as of today, the design of AQFP complex circuits is still limited by the ability of design tools to efficiently take into account the different AQFP technology requirements. For instance, AQFP logic cells are abstracted by the majority operation, require data and clocking in specific timing windows and have fan-out limitations. In this work, we implement a novel majority-based logic synthesis flow addressing AQFP technology. In particular, we present both algebraic and Boolean methods over majority-inverter graphs (MIGs) aiming at optimizing size and depth of logic circuits. The technology limitations and constraints of the AQFP technology (e.g., path balancing and maximum fanout) are considered during the optimization steps. The experimental results show that our flow reduces both size and depth of MIGs, while meeting the constraint set by the AQFP technology. Further, we demonstrate an improvementfor both area and delay when the MIGs are mapped into the AQFP technology.